Optimization of the buffer layer in a 15kV SiC N-type gate commutated thyristor for safe, low-loss switching
This paper explores the design and optimization of the buffer layer in Silicon Carbide (SiC) N-type Gate Commutated Thyristors (GCTs) to enhance low-loss switching and ensure safe operation in ultra high-voltage (over 10 kV) applications. The challenges posed by high dv/dt conditions during turn-off...
Saved in:
| Main Authors: | , , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2025-06-01
|
| Series: | Power Electronic Devices and Components |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2772370425000240 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|