Analog Computing for Nonlinear Shock Tube PDE Models: Test and Measurement of CMOS Chip

Analog Computing for Nonlinear Shock Tube PDE Models: Test and Measurement of CMOS Chip

Long left ignored by the digital computing industry since its heyday in 1940’s, analog computing is today making a comeback as Moore’s Law slows down. Analog CMOS has power efficiency advantages over digital CMOS for low-precision applications in edge computing, scientific comp...

Full description

Saved in:
Bibliographic Details
Main Authors: Hasantha Malavipathirana, Soumyajit Mandal, Nilan Udayanga, Yingying Wang, S. I. Hariharan, Arjuna Madanayake
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
Analog computing
finite-difference time domain (FDTD)
acceleration
CMOS
nonlinear
partial differential equations (PDEs)
Online Access:https://ieeexplore.ieee.org/document/10818682/
Tags: Add Tag
No Tags, Be the first to tag this record!

Internet

https://ieeexplore.ieee.org/document/10818682/

Similar Items