Chip Design of PTP Time Synchronization for Industrial IoT

The world is currently in the midst of the fourth industrial revolution (also known as Industry 4.0). Its core concept is to apply technologies such as computer networking, big data, artificial intelligence and cloud services to manufacturing. Because information between each other must be communica...

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Main Authors: Yee-Shao Chen, Yuan-Sun Chu, da-Wei Lo, Yen-Ting Chiang, Ting-Chao Hou
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10850902/
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author Yee-Shao Chen
Yuan-Sun Chu
da-Wei Lo
Yen-Ting Chiang
Ting-Chao Hou
author_facet Yee-Shao Chen
Yuan-Sun Chu
da-Wei Lo
Yen-Ting Chiang
Ting-Chao Hou
author_sort Yee-Shao Chen
collection DOAJ
description The world is currently in the midst of the fourth industrial revolution (also known as Industry 4.0). Its core concept is to apply technologies such as computer networking, big data, artificial intelligence and cloud services to manufacturing. Because information between each other must be communicated immediately to ensure that each device in the system performs work at an accurate time. Therefore, each device in the computer network needs a precise reference time, and high-precision time synchronization technology plays an indispensable role. After a detailed study of the IEEE 1588 protocol, this paper found that the main sources of time errors are frequency changes caused by the temperature characteristics and aging of the crystal oscillator, the uncertainty of network protocol stacking delay, and the queuing delay caused by packets. In order to improve time accuracy and reduce delays caused by network protocol stacking, this study designed the chip on the data link layer and optimized the original IEEE 1588 protocol. These optimization methods include compensating clock skew and removing run-trip delay Time is too large mechanism. Finally, this paper designed an IEEE 1588 protocol chip located on the data connection layer based on these methods, and achieved an operating frequency of 434MHz under the 45nm process. Experimental results show that the time synchronization value can be maintained within ±26 nanoseconds. This can not only effectively reduce the delay caused by network protocol stacking, but also meet the requirements for time synchronization accuracy of the modern industrial Internet of Things.
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spelling doaj-art-ef494c90bccb4188ab8ec946d2e646c72025-02-06T00:00:49ZengIEEEIEEE Access2169-35362025-01-0113219662197910.1109/ACCESS.2025.353338410850902Chip Design of PTP Time Synchronization for Industrial IoTYee-Shao Chen0Yuan-Sun Chu1https://orcid.org/0000-0002-7511-8340da-Wei Lo2Yen-Ting Chiang3Ting-Chao Hou4https://orcid.org/0000-0003-3670-5080MediaTek, Hsinchu, TaiwanDepartment of Electrical Engineering, Advanced Institute for Manufacturing with High-Tech Innovations (AIM-HI), National Chung Cheng University, Chiayi, TaiwanDepartment of Electrical Engineering, National Chung Cheng University, Chiayi, TaiwanDepartment of Electrical Engineering, National Chung Cheng University, Chiayi, TaiwanDepartment of Communication Engineering, National Chung Cheng University, Chiayi, TaiwanThe world is currently in the midst of the fourth industrial revolution (also known as Industry 4.0). Its core concept is to apply technologies such as computer networking, big data, artificial intelligence and cloud services to manufacturing. Because information between each other must be communicated immediately to ensure that each device in the system performs work at an accurate time. Therefore, each device in the computer network needs a precise reference time, and high-precision time synchronization technology plays an indispensable role. After a detailed study of the IEEE 1588 protocol, this paper found that the main sources of time errors are frequency changes caused by the temperature characteristics and aging of the crystal oscillator, the uncertainty of network protocol stacking delay, and the queuing delay caused by packets. In order to improve time accuracy and reduce delays caused by network protocol stacking, this study designed the chip on the data link layer and optimized the original IEEE 1588 protocol. These optimization methods include compensating clock skew and removing run-trip delay Time is too large mechanism. Finally, this paper designed an IEEE 1588 protocol chip located on the data connection layer based on these methods, and achieved an operating frequency of 434MHz under the 45nm process. Experimental results show that the time synchronization value can be maintained within ±26 nanoseconds. This can not only effectively reduce the delay caused by network protocol stacking, but also meet the requirements for time synchronization accuracy of the modern industrial Internet of Things.https://ieeexplore.ieee.org/document/10850902/Clock synchronizationIndustrial Internet of Things (IIoT)precision time protocol (PTP)
spellingShingle Yee-Shao Chen
Yuan-Sun Chu
da-Wei Lo
Yen-Ting Chiang
Ting-Chao Hou
Chip Design of PTP Time Synchronization for Industrial IoT
IEEE Access
Clock synchronization
Industrial Internet of Things (IIoT)
precision time protocol (PTP)
title Chip Design of PTP Time Synchronization for Industrial IoT
title_full Chip Design of PTP Time Synchronization for Industrial IoT
title_fullStr Chip Design of PTP Time Synchronization for Industrial IoT
title_full_unstemmed Chip Design of PTP Time Synchronization for Industrial IoT
title_short Chip Design of PTP Time Synchronization for Industrial IoT
title_sort chip design of ptp time synchronization for industrial iot
topic Clock synchronization
Industrial Internet of Things (IIoT)
precision time protocol (PTP)
url https://ieeexplore.ieee.org/document/10850902/
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