High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs
Generalized parallel counters (GPCs) are used in constructing high speed compressor trees. Prior work has focused on utilizing the fast carry chain and mapping the logic onto Look-Up Tables (LUTs). This mapping is not optimal in the sense that the LUT fabric is not fully utilized. This results in lo...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2015-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2015/518272 |
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