How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization
Dynamic Circuit Specialization is used to optimize the implementation of a parameterized application on an FPGA. Instead of implementing the parameters as regular inputs, in the DCS approach these inputs are implemented as constants. When the parameter values change, the design is reoptimized for th...
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Language: | English |
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Wiley
2016-01-01
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Series: | International Journal of Reconfigurable Computing |
Online Access: | http://dx.doi.org/10.1155/2016/5340318 |
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author | Amit Kulkarni Dirk Stroobandt |
author_facet | Amit Kulkarni Dirk Stroobandt |
author_sort | Amit Kulkarni |
collection | DOAJ |
description | Dynamic Circuit Specialization is used to optimize the implementation of a parameterized application on an FPGA. Instead of implementing the parameters as regular inputs, in the DCS approach these inputs are implemented as constants. When the parameter values change, the design is reoptimized for the new constant values by reconfiguring the FPGA. This allows faster and more resource-efficient implementation but investigations have shown that reconfiguration time is the major limitation for DCS implementation on Xilinx FPGAs. The limitation arises from the use of inefficient reconfiguration methods in conventional DCS implementation. To address this issue, we propose different approaches to reduce the reconfiguration time drastically and improve the reconfiguration speed. In this context, this paper presents the use of custom reconfiguration controllers and custom reconfiguration software drivers, along with placement constraints to shorten the reconfiguration time. Our results show an improvement in the reconfiguration speed by at least a factor 14 by using Xilinx reconfiguration controller along with placement constraints. However, the improvement can go up to a factor 40 with the combination of a custom reconfiguration controller, custom software drivers, and placement constraints. We also observe depreciation in the system’s performance by at least 6% due to placement constraints. |
format | Article |
id | doaj-art-db67d9aae9754991a2f6aa6b6bce966d |
institution | Kabale University |
issn | 1687-7195 1687-7209 |
language | English |
publishDate | 2016-01-01 |
publisher | Wiley |
record_format | Article |
series | International Journal of Reconfigurable Computing |
spelling | doaj-art-db67d9aae9754991a2f6aa6b6bce966d2025-02-03T01:30:58ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092016-01-01201610.1155/2016/53403185340318How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit SpecializationAmit Kulkarni0Dirk Stroobandt1ELIS Department, Computer Systems Lab, Ghent University, Sint-Pietersnieuwstraat 41, 9000 Ghent, BelgiumELIS Department, Computer Systems Lab, Ghent University, Sint-Pietersnieuwstraat 41, 9000 Ghent, BelgiumDynamic Circuit Specialization is used to optimize the implementation of a parameterized application on an FPGA. Instead of implementing the parameters as regular inputs, in the DCS approach these inputs are implemented as constants. When the parameter values change, the design is reoptimized for the new constant values by reconfiguring the FPGA. This allows faster and more resource-efficient implementation but investigations have shown that reconfiguration time is the major limitation for DCS implementation on Xilinx FPGAs. The limitation arises from the use of inefficient reconfiguration methods in conventional DCS implementation. To address this issue, we propose different approaches to reduce the reconfiguration time drastically and improve the reconfiguration speed. In this context, this paper presents the use of custom reconfiguration controllers and custom reconfiguration software drivers, along with placement constraints to shorten the reconfiguration time. Our results show an improvement in the reconfiguration speed by at least a factor 14 by using Xilinx reconfiguration controller along with placement constraints. However, the improvement can go up to a factor 40 with the combination of a custom reconfiguration controller, custom software drivers, and placement constraints. We also observe depreciation in the system’s performance by at least 6% due to placement constraints.http://dx.doi.org/10.1155/2016/5340318 |
spellingShingle | Amit Kulkarni Dirk Stroobandt How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization International Journal of Reconfigurable Computing |
title | How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization |
title_full | How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization |
title_fullStr | How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization |
title_full_unstemmed | How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization |
title_short | How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization |
title_sort | how to efficiently reconfigure tunable lookup tables for dynamic circuit specialization |
url | http://dx.doi.org/10.1155/2016/5340318 |
work_keys_str_mv | AT amitkulkarni howtoefficientlyreconfiguretunablelookuptablesfordynamiccircuitspecialization AT dirkstroobandt howtoefficientlyreconfiguretunablelookuptablesfordynamiccircuitspecialization |