Design of an Intermittent-Computing-Oriented Nonvolatile Register With a Switching-Probability-Aware Store-and-Verify Scheme

Design of an Intermittent-Computing-Oriented Nonvolatile Register With a Switching-Probability-Aware Store-and-Verify Scheme

This paper describes the configuration of a magnetic tunnel junction (MTJ)-based nonvolatile register designed for the greedy utilization of supplied energy in intermittent computing. The MTJ device is a type of spintronic device that exhibits two resistance states in a nonvolatile manner, and switc...

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Bibliographic Details
Main Authors: Masanori Natsui, Takahiro Hanyu
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
Intermittent computing
Internet of Things
CMOS/MTJ-hybrid process
nonvolatile register
nonvolatile CPU
magnetic tunnel junction
Online Access:https://ieeexplore.ieee.org/document/10906498/
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Summary:This paper describes the configuration of a magnetic tunnel junction (MTJ)-based nonvolatile register designed for the greedy utilization of supplied energy in intermittent computing. The MTJ device is a type of spintronic device that exhibits two resistance states in a nonvolatile manner, and switching between these states is probabilistic. To maintain data consistency in intermittent computing, achieving a high probability of success for MTJ device switching is essential. Conventional MTJ-based nonvolatile registers guarantee a specific success rate through data backup processes with large currents flowing for long periods. In contrast, the proposed register performs data store operations with short pulses repeated as needed with verification of information stored in the nonvolatile memory section, enabling energy-efficient data backup while ensuring the equivalent success rate. Performance evaluation using a 55 nm CMOS/MTJ-hybrid process technology demonstrates that the proposed nonvolatile register reduces the energy required for data backup by 65% compared to conventional configurations. Additionally, it has been shown that the proposed method can improve the active time ratio of intermittent computing using an IoT system based on a RISC-V CPU by approximately 70%.
ISSN:2169-3536

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