John, T. M., & Chacko, S. FPGA‐based implementation of floating point processing element for the design of efficient FIR filters. Wiley.
Chicago Style (17th ed.) CitationJohn, Tintu Mary, and Shanty Chacko. FPGA‐based Implementation of Floating Point Processing Element for the Design of Efficient FIR Filters. Wiley.
MLA (9th ed.) CitationJohn, Tintu Mary, and Shanty Chacko. FPGA‐based Implementation of Floating Point Processing Element for the Design of Efficient FIR Filters. Wiley.
Warning: These citations may not always be 100% accurate.