A Comparative Performance Study of Hybrid SET-CMOS Based Logic Circuits for the Estimation of Robustness
The urge of inventing a new low power consuming device for the post CMOS future technology has drawn the attention of the researchers on Single Electron Transistor [SET]. The two main virtues, ultra low power consumption [1] and ultra small dimension of SET [12, 13] have stimulated the researchers t...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Sumy State University
2013-10-01
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| Series: | Журнал нано- та електронної фізики |
| Subjects: | |
| Online Access: | http://jnep.sumdu.edu.ua/download/numbers/2013/3/articles/jnep_2013_V5_03057.pdf |
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