Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level
This study explores the impact of integrating a gallium arsenide (GaAs) pocket at the source and drain in a dual-material gate-oxide-stack double-gate tunnel field-effect transistor (DMGOSDG-TFET). The performance of this DMGOSDG-TFET, employing work-function engineering and gate-oxide-stack techniq...
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| Format: | Article |
| Language: | English |
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Wiley
2024-01-01
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| Series: | IET Circuits, Devices and Systems |
| Online Access: | http://dx.doi.org/10.1049/2024/9925894 |
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| author | Km. Sucheta Singh Satyendra Kumar Saurabh Chaturvedi Kapil Dev Tyagi Vaibhav Bhushan Tyagi |
| author_facet | Km. Sucheta Singh Satyendra Kumar Saurabh Chaturvedi Kapil Dev Tyagi Vaibhav Bhushan Tyagi |
| author_sort | Km. Sucheta Singh |
| collection | DOAJ |
| description | This study explores the impact of integrating a gallium arsenide (GaAs) pocket at the source and drain in a dual-material gate-oxide-stack double-gate tunnel field-effect transistor (DMGOSDG-TFET). The performance of this DMGOSDG-TFET, employing work-function engineering and gate-oxide-stack techniques, is compared with a GaAs pocket-doped DMGOSDG-TFET. Using the Silvaco Technology Computer-Aided Design tool, the comparison covers DC characteristics, analog/RF behavior, and circuit-level assessments. The research introduces an optimized heterostructure pocket-doped DMGOSDG-TFET to enhance DC characteristics, analog/RF performance, and DC/transient analysis. This novel architecture effectively suppresses ambipolarity, making it more suitable for current conduction. The incorporation of work-function engineering and a gate-oxide-stack approach enhances the device’s current driving capability, while the use of a highly doped GaAs pocket at the source and drain virtually eliminates ambipolar current conduction. Simulation results indicate that the proposed heterostructure device exhibits a high ON-current and switching ratio. For analog/RF applications, the optimized heterostructure device outperforms conventional DMGOSDG-TFET, offering higher cutoff frequency, transconductance, and other analog/RF parameters. Circuit-level performance is assessed using HSPICE, with a focus on the implementation of a resistive-load inverter for both proposed and conventional device topologies through DC and transient evaluations. |
| format | Article |
| id | doaj-art-b09d75babf4c4a1484aa8fc461072202 |
| institution | Kabale University |
| issn | 1751-8598 |
| language | English |
| publishDate | 2024-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | IET Circuits, Devices and Systems |
| spelling | doaj-art-b09d75babf4c4a1484aa8fc4610722022025-02-03T01:30:21ZengWileyIET Circuits, Devices and Systems1751-85982024-01-01202410.1049/2024/9925894Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit LevelKm. Sucheta Singh0Satyendra Kumar1Saurabh Chaturvedi2Kapil Dev Tyagi3Vaibhav Bhushan Tyagi4Department of Electrical Electronics and Communication EngineeringDepartment of Electronics and Communication EngineeringDepartment of Electronics and Communication EngineeringDepartment of Electronics and Communication EngineeringElectronics and Communication EngineeringThis study explores the impact of integrating a gallium arsenide (GaAs) pocket at the source and drain in a dual-material gate-oxide-stack double-gate tunnel field-effect transistor (DMGOSDG-TFET). The performance of this DMGOSDG-TFET, employing work-function engineering and gate-oxide-stack techniques, is compared with a GaAs pocket-doped DMGOSDG-TFET. Using the Silvaco Technology Computer-Aided Design tool, the comparison covers DC characteristics, analog/RF behavior, and circuit-level assessments. The research introduces an optimized heterostructure pocket-doped DMGOSDG-TFET to enhance DC characteristics, analog/RF performance, and DC/transient analysis. This novel architecture effectively suppresses ambipolarity, making it more suitable for current conduction. The incorporation of work-function engineering and a gate-oxide-stack approach enhances the device’s current driving capability, while the use of a highly doped GaAs pocket at the source and drain virtually eliminates ambipolar current conduction. Simulation results indicate that the proposed heterostructure device exhibits a high ON-current and switching ratio. For analog/RF applications, the optimized heterostructure device outperforms conventional DMGOSDG-TFET, offering higher cutoff frequency, transconductance, and other analog/RF parameters. Circuit-level performance is assessed using HSPICE, with a focus on the implementation of a resistive-load inverter for both proposed and conventional device topologies through DC and transient evaluations.http://dx.doi.org/10.1049/2024/9925894 |
| spellingShingle | Km. Sucheta Singh Satyendra Kumar Saurabh Chaturvedi Kapil Dev Tyagi Vaibhav Bhushan Tyagi Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level IET Circuits, Devices and Systems |
| title | Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level |
| title_full | Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level |
| title_fullStr | Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level |
| title_full_unstemmed | Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level |
| title_short | Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level |
| title_sort | performance assessment of gaas pocket doped dual material gate oxide stack dg tfet at device and circuit level |
| url | http://dx.doi.org/10.1049/2024/9925894 |
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