On broadband, linear-phase, flat group delay, all-pole, low-pass filters for high-speed, data communication
A tunable, 10-stage, all-pole, Papoulis, low-pass filter, occupying 0.1815 mm2 is designed and integrated as a building block in a 22 nm CMOS FDSOI receiver for 5G/6G. Each filter stage comprises of a two-stage unity gain amplifier with common mode feedback loop. Tunable resistors between each stage...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2025-03-01
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| Series: | Results in Engineering |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2590123025001914 |
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