APA (7th ed.) Citation

Hossain, M. R., Rahman, M. S., Zaman, K. S., Fezzani, W. E., Bhuiyan, M. A. S., Kang, C. C., . . . Miraz, M. H. Low latency FPGA implementation of twisted Edward curve cryptography hardware accelerator over prime field. Nature Portfolio.

Chicago Style (17th ed.) Citation

Hossain, Md Rownak, Md Sazedur Rahman, Kh Shahriya Zaman, Walid El Fezzani, Mohammad Arif Sobhan Bhuiyan, Chia Chao Kang, Teh Jia Yew, and Mahdi H. Miraz. Low Latency FPGA Implementation of Twisted Edward Curve Cryptography Hardware Accelerator over Prime Field. Nature Portfolio.

MLA (9th ed.) Citation

Hossain, Md Rownak, et al. Low Latency FPGA Implementation of Twisted Edward Curve Cryptography Hardware Accelerator over Prime Field. Nature Portfolio.