An Extendable 17-Level Inverter With Suppressed Inrush Current and Reduced Component Count
This paper proposes a switched-capacitor-based 17-level inverter to reduce the number of components, limit inrush current, and minimize the components’ total standing voltage (TSV). The proposed structures circuit combines switched-capacitor (SC) units, including a series-parallel (SPSC)...
Saved in:
| Main Authors: | , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
|
| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10958190/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | This paper proposes a switched-capacitor-based 17-level inverter to reduce the number of components, limit inrush current, and minimize the components’ total standing voltage (TSV). The proposed structures circuit combines switched-capacitor (SC) units, including a series-parallel (SPSC) unit, a double unit, a flying capacitor (FC), and two inverted half-bridges (HBs) for generating positive and negative polarities. The proposed structure, with a low number of devices, reduced components with maximum blocking voltage to only two switches (<inline-formula> <tex-math notation="LaTeX">${\mathrm{N}}_{\mathrm {MBV}}=2$ </tex-math></inline-formula>), inrush current limitation, four-times boosting capability, and no need for unidirectional current switches, is a suitable choice in the field of multi-level inverters based on a switched capacitor. The proposed structure comprises ten switches, three diodes, and four capacitors. The capacitors in the structure are capable of automatic voltage balancing using the proposed switching method based on level-shift pulse width modulation. The flying capacitor in the proposed structure can automatically balance at half the voltage of the DC link (0.5E). The proposed structure requires only five switching signals and simple control of the intrinsic voltage balance of the capacitors, which reduces the size of the power switch driver and decreases the system cost. The proposed structure is compared with other 17-level SC-based structures, demonstrating its advantages. The performance of The proposed structure, the pulse width modulation method, capacitor voltage balancing, charging current stress, and losses have been thoroughly analyzed. The simulation results are thoroughly presented, showcasing the circuit’s performance metrics under various conditions. Additionally, experimental results are included to validate these findings, demonstrating that the circuit operates as intended. |
|---|---|
| ISSN: | 2169-3536 |