100 Gbps Low-Latency Protocol Processing and FPGA Implementation

100 Gbps Low-Latency Protocol Processing and FPGA Implementation

With the ongoing evolution of integrated space-air-ground networks, space laser communications face increasingly stringent demands for low latency and high throughput in high-speed data transmission. To meet these requirements, this paper presents a low-latency protocol stack processing architecture...

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Bibliographic Details
Main Authors: Liangwei Lei, Funan Zhu, Shaowen Lu, Yaohui Du, Jiawei Li, Xia Hou
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
FPGA
low-latency protocol stack
data alignment
adaptive inter-frame interval control
high throughput
Online Access:https://ieeexplore.ieee.org/document/10918990/
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https://ieeexplore.ieee.org/document/10918990/

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