Design Strategies of Capacitor‐Based Synaptic Cell for High‐Efficiency Analog Neural Network Training

Design Strategies of Capacitor‐Based Synaptic Cell for High‐Efficiency Analog Neural Network Training

Analog in‐memory computing, leveraging resistive switching cross‐point devices known as resistive processing units (RPUs), offers substantial improvements in the performance and energy efficiency of deep neural network (DNN) training. Among the promising candidates for RPU devices, the capacitor‐bas...

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Main Authors: Byoungwoo Lee, Wonjae Ji, Hyejin Kim, Seungmin Han, Geonwoong Park, Pyeongkang Hur, Gilsu Jeon, Hyung‐Min Lee, Yoonyoung Chung, Junwoo Son, Yong‐Young Noh, Seyoung Kim
Format: Article
Language:English
Published: Wiley 2025-06-01
Series:Advanced Intelligent Systems
Subjects:
analog computing
capacitor‐based synaptic cell
crossbar array
in‐memory computing
resistive processing unit
thin‐film transistors
Online Access:https://doi.org/10.1002/aisy.202400600
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https://doi.org/10.1002/aisy.202400600

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