BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits
This paper proposed a logic synthesis method based on binary decision diagram (BDD) representation. The proposed method is optimized for dual-threshold independent-gate (DTIG) FinFET circuits. The algorithm of the BDD-based topology optimization is stated in detail. Some kinds of feature subgraph st...
Saved in:
| Main Authors: | , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Wiley
2019-01-01
|
| Series: | Active and Passive Electronic Components |
| Online Access: | http://dx.doi.org/10.1155/2019/8292653 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|