Static Switching Dynamic Buffer Circuit

We proposed footless domino logic buffer circuit. It minimizes redundant switching at the dynamic and the output nodes. The proposed circuit avoids propagation of precharge pulse to the output node and allows the dynamic node which saves power consumption. Simulation is done using 0.18 µm CMOS tech...

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Bibliographic Details
Main Authors: A. K. Pandey, R. A. Mishra, R. K. Nagaria
Format: Article
Language:English
Published: Wiley 2013-01-01
Series:Journal of Engineering
Online Access:http://dx.doi.org/10.1155/2013/646214
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