VLSI design of an irregular LDPC decoder in DTMB

An irregular LDPC decoder with a code length of 7 493 bits for DTMB system was implemented based on SMIC 0.13μm CMOS process.A new method to control memories was proposed,which can reuse memories for three different code rates only by increasing 5% memory usage.The throughput of the LDPC decoder is...

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Bibliographic Details
Main Authors: CHEN Yun, ZENG Xiao-yang, LIN Yi-fan, XIANG Bo, DENG Yun-song
Format: Article
Language:zho
Published: Editorial Department of Journal on Communications 2007-01-01
Series:Tongxin xuebao
Subjects:
Online Access:http://www.joconline.com.cn/zh/article/74658526/
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