A Novel Approach to Test-Induced Defect Detection in Semiconductor Wafers, Using Graph-Based Semi-Supervised Learning (GSSL)

The semiconductor industry plays a vital role in modern technology, with semiconductor devices embedded in almost all electronic products. As these devices become increasingly complex, ensuring quality and reliability poses significant challenges. Electrical testing on semiconductor wafers for defec...

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Main Authors: Pedram Aridas, Narendra Kumar, Anis Salwa Mohd Khairuddin, Daniel Ting, Vivek Regeev
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10855443/
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author Pedram Aridas
Narendra Kumar
Anis Salwa Mohd Khairuddin
Daniel Ting
Vivek Regeev
author_facet Pedram Aridas
Narendra Kumar
Anis Salwa Mohd Khairuddin
Daniel Ting
Vivek Regeev
author_sort Pedram Aridas
collection DOAJ
description The semiconductor industry plays a vital role in modern technology, with semiconductor devices embedded in almost all electronic products. As these devices become increasingly complex, ensuring quality and reliability poses significant challenges. Electrical testing on semiconductor wafers for defects is crucial, but paradoxically, the testing process itself can introduce defects. These test-induced defects could remain undetected on the wafer, proceed through assembly, and may only be discovered later by customers, leading to returns and significant yield loss. This study proposes a novel graph-based semi-supervised learning (GSSL) algorithm to identify these test-induced hidden defects on the semiconductor wafer that escape conventional methods. The algorithm, which incorporates domain knowledge in creating a graph representation of wafer, and utilizing a weighted edge label propagation model, has demonstrated its effectiveness by achieving a 68% accuracy on a real-world dataset, offering a promising approach to enhance quality control in semiconductor manufacturing.
format Article
id doaj-art-5f1e5ac7e31f4fb49f59ef8dda39a032
institution Kabale University
issn 2169-3536
language English
publishDate 2025-01-01
publisher IEEE
record_format Article
series IEEE Access
spelling doaj-art-5f1e5ac7e31f4fb49f59ef8dda39a0322025-02-06T00:00:35ZengIEEEIEEE Access2169-35362025-01-0113216782169410.1109/ACCESS.2025.353510310855443A Novel Approach to Test-Induced Defect Detection in Semiconductor Wafers, Using Graph-Based Semi-Supervised Learning (GSSL)Pedram Aridas0https://orcid.org/0000-0001-8239-1823Narendra Kumar1https://orcid.org/0000-0001-9999-8971Anis Salwa Mohd Khairuddin2https://orcid.org/0000-0002-9873-4779Daniel Ting3Vivek Regeev4https://orcid.org/0009-0008-6997-6622Department of Electrical Engineering, Faculty of Engineering, University of Malaya, Kuala Lumpur, MalaysiaDepartment of Electrical Engineering, Faculty of Engineering, University of Malaya, Kuala Lumpur, MalaysiaDepartment of Electrical Engineering, Faculty of Engineering, University of Malaya, Kuala Lumpur, MalaysiaNXP Malaysia, Petaling Jaya, Selangor, MalaysiaNXP Malaysia, Petaling Jaya, Selangor, MalaysiaThe semiconductor industry plays a vital role in modern technology, with semiconductor devices embedded in almost all electronic products. As these devices become increasingly complex, ensuring quality and reliability poses significant challenges. Electrical testing on semiconductor wafers for defects is crucial, but paradoxically, the testing process itself can introduce defects. These test-induced defects could remain undetected on the wafer, proceed through assembly, and may only be discovered later by customers, leading to returns and significant yield loss. This study proposes a novel graph-based semi-supervised learning (GSSL) algorithm to identify these test-induced hidden defects on the semiconductor wafer that escape conventional methods. The algorithm, which incorporates domain knowledge in creating a graph representation of wafer, and utilizing a weighted edge label propagation model, has demonstrated its effectiveness by achieving a 68% accuracy on a real-world dataset, offering a promising approach to enhance quality control in semiconductor manufacturing.https://ieeexplore.ieee.org/document/10855443/Defect detectiongraphsemi-supervised learningsemiconductor wafertest-induced
spellingShingle Pedram Aridas
Narendra Kumar
Anis Salwa Mohd Khairuddin
Daniel Ting
Vivek Regeev
A Novel Approach to Test-Induced Defect Detection in Semiconductor Wafers, Using Graph-Based Semi-Supervised Learning (GSSL)
IEEE Access
Defect detection
graph
semi-supervised learning
semiconductor wafer
test-induced
title A Novel Approach to Test-Induced Defect Detection in Semiconductor Wafers, Using Graph-Based Semi-Supervised Learning (GSSL)
title_full A Novel Approach to Test-Induced Defect Detection in Semiconductor Wafers, Using Graph-Based Semi-Supervised Learning (GSSL)
title_fullStr A Novel Approach to Test-Induced Defect Detection in Semiconductor Wafers, Using Graph-Based Semi-Supervised Learning (GSSL)
title_full_unstemmed A Novel Approach to Test-Induced Defect Detection in Semiconductor Wafers, Using Graph-Based Semi-Supervised Learning (GSSL)
title_short A Novel Approach to Test-Induced Defect Detection in Semiconductor Wafers, Using Graph-Based Semi-Supervised Learning (GSSL)
title_sort novel approach to test induced defect detection in semiconductor wafers using graph based semi supervised learning gssl
topic Defect detection
graph
semi-supervised learning
semiconductor wafer
test-induced
url https://ieeexplore.ieee.org/document/10855443/
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