Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL Synthesizers

Autocalibration of VCO frequency and loop gain is an essential process in PLL frequency synthesizers. In a wide tuning-range fractional-N PLL frequency synthesizer, high-speed and high-precision automatic calibration is especially important for shortening the lock time and improving the phase noise....

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Main Authors: Jaewook Shin, Hyunchol Shin
Format: Article
Language:English
Published: Wiley 2011-01-01
Series:Journal of Electrical and Computer Engineering
Online Access:http://dx.doi.org/10.1155/2011/139183
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author Jaewook Shin
Hyunchol Shin
author_facet Jaewook Shin
Hyunchol Shin
author_sort Jaewook Shin
collection DOAJ
description Autocalibration of VCO frequency and loop gain is an essential process in PLL frequency synthesizers. In a wide tuning-range fractional-N PLL frequency synthesizer, high-speed and high-precision automatic calibration is especially important for shortening the lock time and improving the phase noise. This paper reviews the design issues of the PLL auto-calibration and discusses on the limitations of the previous techniques. A very simple and efficient auto-calibration method based on a high-speed frequency-to-digital converter (FDC) is proposed and verified through simulations. The proposed method is highly suited for a very wide-band ΔΣ fractional-N PLL.
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institution Kabale University
issn 2090-0147
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publishDate 2011-01-01
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spelling doaj-art-37b14c7b44ec4d66818852c53f5abd4a2025-02-03T01:28:25ZengWileyJournal of Electrical and Computer Engineering2090-01472090-01552011-01-01201110.1155/2011/139183139183Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL SynthesizersJaewook Shin0Hyunchol Shin1High-Speed Integrated Circuits and Systems Laboratory, Kwangwoon University, Seoul 139-701, Republic of KoreaHigh-Speed Integrated Circuits and Systems Laboratory, Kwangwoon University, Seoul 139-701, Republic of KoreaAutocalibration of VCO frequency and loop gain is an essential process in PLL frequency synthesizers. In a wide tuning-range fractional-N PLL frequency synthesizer, high-speed and high-precision automatic calibration is especially important for shortening the lock time and improving the phase noise. This paper reviews the design issues of the PLL auto-calibration and discusses on the limitations of the previous techniques. A very simple and efficient auto-calibration method based on a high-speed frequency-to-digital converter (FDC) is proposed and verified through simulations. The proposed method is highly suited for a very wide-band ΔΣ fractional-N PLL.http://dx.doi.org/10.1155/2011/139183
spellingShingle Jaewook Shin
Hyunchol Shin
Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL Synthesizers
Journal of Electrical and Computer Engineering
title Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL Synthesizers
title_full Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL Synthesizers
title_fullStr Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL Synthesizers
title_full_unstemmed Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL Synthesizers
title_short Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL Synthesizers
title_sort design considerations for autocalibrations of wide band δσ fractional n pll synthesizers
url http://dx.doi.org/10.1155/2011/139183
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AT hyuncholshin designconsiderationsforautocalibrationsofwidebanddsfractionalnpllsynthesizers