Accelerating Deep Learning-Based Morphological Biometric Recognition with Field-Programmable Gate Arrays
Convolutional neural networks (CNNs) are increasingly recognized as an important and potent artificial intelligence approach, widely employed in many computer vision applications, such as facial recognition. Their importance resides in their capacity to acquire hierarchical features, which is essent...
Saved in:
| Main Authors: | , , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2025-01-01
|
| Series: | AI |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2673-2688/6/1/8 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1832589388364644352 |
|---|---|
| author | Nourhan Zayed Nahed Tawfik Mervat M. A. Mahmoud Ahmed Fawzy Young-Im Cho Mohamed S. Abdallah |
| author_facet | Nourhan Zayed Nahed Tawfik Mervat M. A. Mahmoud Ahmed Fawzy Young-Im Cho Mohamed S. Abdallah |
| author_sort | Nourhan Zayed |
| collection | DOAJ |
| description | Convolutional neural networks (CNNs) are increasingly recognized as an important and potent artificial intelligence approach, widely employed in many computer vision applications, such as facial recognition. Their importance resides in their capacity to acquire hierarchical features, which is essential for recognizing complex patterns. Nevertheless, the intricate architectural design of CNNs leads to significant computing requirements. To tackle these issues, it is essential to construct a system based on field-programmable gate arrays (FPGAs) to speed up CNNs. FPGAs provide fast development capabilities, energy efficiency, decreased latency, and advanced reconfigurability. A facial recognition solution by leveraging deep learning and subsequently deploying it on an FPGA platform is suggested. The system detects whether a person has the necessary authorization to enter/access a place. The FPGA is responsible for processing this system with utmost security and without any internet connectivity. Various facial recognition networks are accomplished, including AlexNet, ResNet, and VGG-16 networks. The findings of the proposed method prove that the GoogLeNet network is the best fit due to its lower computational resource requirements, speed, and accuracy. The system was deployed on three hardware kits to appraise the performance of different programming approaches in terms of accuracy, latency, cost, and power consumption. The software programming on the Raspberry Pi-3B kit had a recognition accuracy of around 70–75% and relied on a stable internet connection for processing. This dependency on internet connectivity increases bandwidth consumption and fails to meet the required security criteria, contrary to ZYBO-Z7 board hardware programming. Nevertheless, the hardware/software co-design on the PYNQ-Z2 board achieved an accuracy rate of 85% to 87%. It operates independently of an internet connection, making it a standalone system and saving costs. |
| format | Article |
| id | doaj-art-35d9a81a45544c61b8166dc2186f9b3e |
| institution | Kabale University |
| issn | 2673-2688 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | AI |
| spelling | doaj-art-35d9a81a45544c61b8166dc2186f9b3e2025-01-24T13:17:22ZengMDPI AGAI2673-26882025-01-0161810.3390/ai6010008Accelerating Deep Learning-Based Morphological Biometric Recognition with Field-Programmable Gate ArraysNourhan Zayed0Nahed Tawfik1Mervat M. A. Mahmoud2Ahmed Fawzy3Young-Im Cho4Mohamed S. Abdallah5Computers and Systems Department, Electronics Research Institute (ERI), Cairo 11843, EgyptComputers and Systems Department, Electronics Research Institute (ERI), Cairo 11843, EgyptMicroelectronics Department, Electronics Research Institute (ERI), Cairo 11843, EgyptNanotechnology Lab, Electronics Research Institute (ERI), Cairo 11843, EgyptDepartment of Computer Engineering, Gachon University, Seongnam 13415, Republic of KoreaInformatics Department, Electronics Research Institute (ERI), Cairo 11843, EgyptConvolutional neural networks (CNNs) are increasingly recognized as an important and potent artificial intelligence approach, widely employed in many computer vision applications, such as facial recognition. Their importance resides in their capacity to acquire hierarchical features, which is essential for recognizing complex patterns. Nevertheless, the intricate architectural design of CNNs leads to significant computing requirements. To tackle these issues, it is essential to construct a system based on field-programmable gate arrays (FPGAs) to speed up CNNs. FPGAs provide fast development capabilities, energy efficiency, decreased latency, and advanced reconfigurability. A facial recognition solution by leveraging deep learning and subsequently deploying it on an FPGA platform is suggested. The system detects whether a person has the necessary authorization to enter/access a place. The FPGA is responsible for processing this system with utmost security and without any internet connectivity. Various facial recognition networks are accomplished, including AlexNet, ResNet, and VGG-16 networks. The findings of the proposed method prove that the GoogLeNet network is the best fit due to its lower computational resource requirements, speed, and accuracy. The system was deployed on three hardware kits to appraise the performance of different programming approaches in terms of accuracy, latency, cost, and power consumption. The software programming on the Raspberry Pi-3B kit had a recognition accuracy of around 70–75% and relied on a stable internet connection for processing. This dependency on internet connectivity increases bandwidth consumption and fails to meet the required security criteria, contrary to ZYBO-Z7 board hardware programming. Nevertheless, the hardware/software co-design on the PYNQ-Z2 board achieved an accuracy rate of 85% to 87%. It operates independently of an internet connection, making it a standalone system and saving costs.https://www.mdpi.com/2673-2688/6/1/8morphological biometricsface recognitionCNNdeep learningFPGA machine learning |
| spellingShingle | Nourhan Zayed Nahed Tawfik Mervat M. A. Mahmoud Ahmed Fawzy Young-Im Cho Mohamed S. Abdallah Accelerating Deep Learning-Based Morphological Biometric Recognition with Field-Programmable Gate Arrays AI morphological biometrics face recognition CNN deep learning FPGA machine learning |
| title | Accelerating Deep Learning-Based Morphological Biometric Recognition with Field-Programmable Gate Arrays |
| title_full | Accelerating Deep Learning-Based Morphological Biometric Recognition with Field-Programmable Gate Arrays |
| title_fullStr | Accelerating Deep Learning-Based Morphological Biometric Recognition with Field-Programmable Gate Arrays |
| title_full_unstemmed | Accelerating Deep Learning-Based Morphological Biometric Recognition with Field-Programmable Gate Arrays |
| title_short | Accelerating Deep Learning-Based Morphological Biometric Recognition with Field-Programmable Gate Arrays |
| title_sort | accelerating deep learning based morphological biometric recognition with field programmable gate arrays |
| topic | morphological biometrics face recognition CNN deep learning FPGA machine learning |
| url | https://www.mdpi.com/2673-2688/6/1/8 |
| work_keys_str_mv | AT nourhanzayed acceleratingdeeplearningbasedmorphologicalbiometricrecognitionwithfieldprogrammablegatearrays AT nahedtawfik acceleratingdeeplearningbasedmorphologicalbiometricrecognitionwithfieldprogrammablegatearrays AT mervatmamahmoud acceleratingdeeplearningbasedmorphologicalbiometricrecognitionwithfieldprogrammablegatearrays AT ahmedfawzy acceleratingdeeplearningbasedmorphologicalbiometricrecognitionwithfieldprogrammablegatearrays AT youngimcho acceleratingdeeplearningbasedmorphologicalbiometricrecognitionwithfieldprogrammablegatearrays AT mohamedsabdallah acceleratingdeeplearningbasedmorphologicalbiometricrecognitionwithfieldprogrammablegatearrays |