Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing
In modern SRAM based Field Programmable Gate Arrays, a Look-Up Table (LUT) is the principal constituent logic element which can realize every possible Boolean function. However, this flexibility of LUTs comes with a heavy area penalty. A part of this area overhead comes from the increased amount of...
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| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2017-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2017/7021056 |
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