Pasithea-1: An Energy-Efficient Sequential Reconfigurable Array With CPU-Like Programmability

Pasithea-1: An Energy-Efficient Sequential Reconfigurable Array With CPU-Like Programmability

This work presents Pasithea-1, a coarse-grained reconfigurable array (CGRA) that combines energy efficiency with CPU-like programmability. Its extensible instruction set uses sequential control flow in code fragments of up to 64 RISC-like instructions, which encode control and dataflow graphs in adj...

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Bibliographic Details
Main Authors: Tobias Kaiser, Esther Gottschalk, Kai Biethahn, Friedel Gerfers
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Open Journal of Circuits and Systems
Subjects:
Computer architecture
reconfigurable architectures
microprocessor chips
energy efficiency
code generation
on-chip interconnection networks
Online Access:https://ieeexplore.ieee.org/document/10802954/
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https://ieeexplore.ieee.org/document/10802954/

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