Kim, D., & Lee, B. Energy- and Area-Efficient CMOS Neuron and Max Pooling Circuit for RRAM-Based CNN Accelerators. IEEE.
Chicago Style (17th ed.) CitationKim, Dowon, and Byung-Geun Lee. Energy- and Area-Efficient CMOS Neuron and Max Pooling Circuit for RRAM-Based CNN Accelerators. IEEE.
MLA (9th ed.) CitationKim, Dowon, and Byung-Geun Lee. Energy- and Area-Efficient CMOS Neuron and Max Pooling Circuit for RRAM-Based CNN Accelerators. IEEE.
Warning: These citations may not always be 100% accurate.