Energy- and Area-Efficient CMOS Neuron and Max Pooling Circuit for RRAM-Based CNN Accelerators

Energy- and Area-Efficient CMOS Neuron and Max Pooling Circuit for RRAM-Based CNN Accelerators

This study proposes an energy- and area-efficient CMOS neuron and analog max pooling circuit for RRAM-based convolutional neural network (CNN) accelerators. The proposed max pooling circuit implements a <inline-formula> <tex-math notation="LaTeX">$2\times 2$ </tex-math>&l...

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Bibliographic Details
Main Authors: Dowon Kim, Byung-Geun Lee
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
CMOS neuron
convolutional neural network
max pooling
ReLU activation function
RRAM
Online Access:https://ieeexplore.ieee.org/document/10994459/
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https://ieeexplore.ieee.org/document/10994459/

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