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A Reconfigurable Framework for Hybrid Quantum–Classical Computing
Published 2025-05-01“…The proposed framework integrates field-programmable gate arrays (FPGAs) with quantum processing units (QPUs) for deploying HQC algorithms. …”
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A novel integration of multi-stocked gated variant recurrent units and Kolmogorov-Arnold tuned deep training networks for anchoring the intrusion detection against computer attacks
Published 2025-07-01“…The major components of the proposed model: (1) Data-Collection and Pre-processing (2) Feature Extraction using MSV-GRU (3) FKA-DLN model for the better classification. …”
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Adenosine A2A receptor activation is necessary to gate the TrkB-dependent intramuscular nerve sprouting during muscle reinnervation after a nerve crush
Published 2025-01-01“…Our results demonstrated that activation of adenosine A2ARs is required to gate the activity-related TrkB-dependent enhancement of axon sprouting during the reinnervation process after a nerve crush. …”
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Design, Implementation, and Analysis of High-Speed Single-Stage N-Sorters and N-Filters
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scSMD: a deep learning method for accurate clustering of single cells based on auto-encoder
Published 2025-01-01“…Conclusion This study underscores the potential of deep learning-specifically the SMD model-in advancing single-cell RNA sequencing data analysis. By integrating innovative computational techniques, the SMD model provides a powerful framework for unraveling cellular complexities, enhancing our understanding of biological processes, and elucidating disease mechanisms. …”
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Modeling Asymmetric Shift in the Threshold Voltage of MOS Structures under Thermal Field Treatment
Published 2025-05-01“…The conducted comparison of the data calculated by the developed model and the experimental data reported in literature for the time dependencies of the threshold voltage shift of MOS structures with positive and subsequent negative gate bias determined the range of binding energies, the characteristic dispersion energy, the concentrations of impurity ions and traps near the gate and the silicon substrate, and the width of the region of their localization. …”
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Highly durable and energy‐efficient probabilistic bits based on h‐BN/SnS2 interface for integer factorization
Published 2025-07-01“…Abstract As social networks and related data processes have grown exponentially in complexity, the efficient resolution of combinatorial optimization problems has become increasingly crucial. …”
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Three-dimensional numerical study of a local scour downstream of a submerged sluice gate using two hydro-morphodynamic models, SedFoam and FLOW-3D
Published 2023-12-01“…Three-dimensional numerical simulations were performed, based on an experimental study of sediments scour process subjected to a water jet downstream of a submerged sluice gate with a rectangular opening at the bottom in a very confined channel. …”
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Learning to trade autonomously in stocks and shares: integrating uncertainty into trading strategies
Published 2025-08-01“…This paper constructs a Bayesian-inferenced Gated Recurrent Unit architecture to support long-term stock price prediction based on characteristics of the stock information learned from historical data, augmented with memory of recent up- and-down fluctuations occur in the data of short-term stock movement. …”
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A High-Speed, Multi-Channel Lossless Compression Algorithm for High-Resolution Video on FPGA
Published 2025-01-01“…Additionally, a novel “first-in, last-out” data inversion technique is employed to solve the problem of real-time processing of four-channel data, significantly reducing FPGA hardware resource usage. …”
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Oxide Phototransistor Array With Multiply-and-Accumulation Functions for In-Sensor Image Processing
Published 2025-01-01“…In this work, we developed a <inline-formula> <tex-math notation="LaTeX">$3\times 3$ </tex-math></inline-formula> ultraviolet (UV) image sensor array based on solution-processed indium oxide (In2O3) phototransistors. The devices exhibit tunable responsivity and unified dark current under negative gate voltage (Vgs), enabling the direct execution of multiply-and-accumulation (MAC) operations. …”
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Si APD-Based High Speed Infrared Radiation Thermometry for Analysing the Temperature Instability of a Combustion Chamber
Published 2024-12-01“…The Si APD-IRT, combined with an optimised field-programmable gate array (FPGA)-based digital design, achieves a response time of 1 µs, faster than commercially available instruments. …”
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Signal Transition Graphs for Asynchronous Data Path Circuits
Published 2023-06-01“…For data path, such an STG always contains alternative branches with the so-called garbage transitions at the gate inputs. …”
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Artificial neural networks in cardiology: analysis of graphic data
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Acetylcholine-gated current translates wake neuronal firing rate information into a spike timing-based code in Non-REM sleep, stabilizing neural network dynamics during memory cons...
Published 2021-09-01“…Our model and experimental data both suggest that this effect is amplified in neural circuits following learning. …”
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FPGA Readout for Frequency-Multiplexed Array of Micromechanical Resonators for Sub-Terahertz Imaging
Published 2024-11-01“…Designing high-performance, high-pixel-density sensors is challenging without FPGAs, which are crucial for deterministic parallel processing, fast ADC/DAC control, and handling large data throughput. …”
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