Energy‐Efficient Hardware Implementation of Spiking‐Restricted Boltzmann Machines Using Pseudo‐Synaptic Sampling by Hyunwoo Kim, Suyeon Jang, Uicheol Shin, Masatoshi Ishii, Atsuya Okazaki, Megumi Ito, Akiyo Nomura, Kohji Hosokawa, Sungmin Lee, Matthew BrightSky, Sangbum Kim

“…Experimental validation of the PS2 method, compared to the RW method, for Modified National Institute of Standards and Technology database (MNIST) training and inference on field‐programmable‐gate‐array‐implemented spiking RBM chips reveals promising results. …”
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Controlled Shared Memory (COSM) Isolation: Design and Testbed Evaluation by Vignesh Sundaravarathan, Martin Reisslein, Akhilesh S. Thyagaturu, Nick Ross, Gurpreet Singh Kalsi, Jason Howard, Jan Kaisrlik, Bartosz Matwiejczyk, Marek M. Landowski, Piotr Dorozynski, Harvey Vrsalovic, Sanjaya Tayal

“…We implement COSM host-to-host isolation in a testbed with an ESMD built on a Field Programmable Gate Array (FPGA). We evaluate the host data write and read rates [bit/s] and latencies under various ESMD loads as well as write-and-read permission configurations. …”
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1-Bit/2-Level Analog-to-Digital Conversion Based on Comparator and FPGA for Aperture Synthesis Passive Millimeter-Wave Imager by Xiangzhou Guo, Ghulam Mehdi, Muhammad Asif, Anyong Hu, Jungang Miao

“…The sampled data are captured by field programmable gate arrays (FPGAs) to perform further signal processing, and a data capture module performing the serial-to-parallel conversion and per-bit deskew is designed in the FPGA to transfer sampled data from the sampling clock domain to the internal processing clock domain. …”
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Integrating cyber-physical systems with embedding technology for controlling autonomous vehicle driving by Manal Abdullah Alohali, Hamed Alqahtani, Abdulbasit Darem, Monir Abdullah, Yunyoung Nam, Mohamed Abouhawwash

“…Because of their post-manufacturing adaptability, parallel processing capabilities, and reconfigurability, field programmable gate arrays (FPGAs) are used to execute reinforcement learning in real-time. …”
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Design and Enhancing Security Performance of Image Cryptography System Based on Fixed Point Chaotic Maps Stream Ciphers in FPGA by Ahmed Amir Salih, Zaid Abdulsattar Abdulrazaq, Harith Ghanim Ayoub

“…The system consists of fixed chaotic maps combined with generated 32-bit Pseudo Number (PN) all implemented using Field Programmable Gate Arrays (FPGA) through the Xilinx System Generator (XSG) environment. …”
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Real-Time Landform Feature Detection and Segmentation Based on Heterogeneous MPSoCs for Lunar Robotic Exploration by Q. Fan, R. Duan, B. Wu, H. Zhou, S. Zhang, Y. Ma

“…MPSoCs integrate multiple processor cores and other components, such as memory and peripheral interfaces, and can include various processors such as ARM cores and Field-Programmable Gate Arrays (FPGAs). FPGA-based MPSoCs are highly customizable and energy-efficient, making them advantageous for addressing the challenges of edge computing tasks in lunar robotic exploration. …”
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FPGA-accelerated mode decomposition for multimode fiber-based communication by Qian Zhang, Yuedi Zhang, Juergen Czarske

“…In this work, we propose using field-programmable gate arrays (FPGAs) to perform neural network inference for MD, marking the first use of FPGAs for this application, which is important, since the latency of closed-loop control could be significantly lower than at GPUs. …”
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Integrating quantum synchronization in future generation networks by Swaraj Shekhar Nande, Muhammad Idham Habibie, Milad Ghadimi, Andrea Garbugli, Koteswararao Kondepu, Riccardo Bassoli, Frank H. P. Fitzek

“…In addition, it is combined with electronic components such as analog-to-digital converters and field-programmable gate arrays (FPGAs) to create synchronized digital signals that are understandable to communication networks. …”
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rule4ml: an open-source tool for resource utilization and latency estimation for ML models on FPGA by Mohammad Mehdi Rahimifar, Hamza Ezzaoui Rahali, Audrey C Therrien

“…Implementing machine learning (ML) models on field-programmable gate arrays (FPGAs) is becoming increasingly popular across various domains as a low-latency and low-power solution that helps manage large data rates generated by continuously improving detectors. …”
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