Design and Implementation of Storage of Network Component Based on NetFPGA10G by Shuolin Zhang, Hongbin Luo

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The Pathogenicity of Shewanella algae and Ability to Tolerate a Wide Range of Temperatures and Salinities by Shu-Ying Tseng, Po-Yu Liu, Yi-Hsuan Lee, Zong-Yen Wu, Chiu-Chen Huang, Ching-Chang Cheng, Kwong-Chung Tung

“…S. algae is adapted to a wide range of temperatures (4°C, 25°C, 37°C, and 42°C) and salinity. …”
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High-Performance Digital Devices Design by the ASMD-FSMD Technique for Implementation in FPGA by Valery Salauyou, Adam Klimowicz, Tomasz Grzes

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La voz del gagá: Un análisis de sus recursos vocales by Sarina Alonzo Ortiz

Subjects: “…Gagá…”
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Impact of Periphytic Algae on Vallisineria Spiralis in Euthophic Water Body with Various Concentration by CAO Yong-xu, CAO Shi-lin

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Accelerating the SM3 hash algorithm with CPU‐FPGA Co‐Designed architecture by Xiaoying Huang, Zhichuan Guo, Mangu Song, Xuewen Zeng

“…The proposed architecture results in an excellent performance in the CPU‐FPGA‐coupled environment.…”
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Chemical Composition, Antifungal, and Cytotoxicity Activities of Inga laurina (Sw.) Willd Leaves by Carla de Moura Martins, Sérgio A. L. de Morais, Mário M. Martins, Luís C. S. Cunha, Cláudio V. da Silva, Carlos H. G. Martins, Luís F. Leandro, Alberto de Oliveira, Francisco J. T. de Aquino, Evandro A. do Nascimento, Roberto Chang

“…The species Inga laurina is native to the Brazilian Cerrado. …”
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Efficient storage method for FPGA-based partially parallel QC-LDPC decoder by Rui-jia YUAN, Bao-ming BAI

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Exponential information’s extraction from power traces of modulo exponentiation implemented on FPGA by WU Zhen, CHEN Yun, CHEN Jun, WANG Min

“…A power analysis model on modulo exponentiation’s computation suitable for real environment was presented in the basis of analysis to the great amount of power traces in the rough.And a method of signal processing for extracting exponential information from the initial power traces was inferred too.Hereby,a power analysis platform was designed and implemented.The exponential information submerged in power traces of 32bit modulo exponentiation algorithms applied in a FPGA chip was successfully extracted where after.Meanwhile,a conclusion about SPA attack on RSA made by Messerges et al,such as the problem with an SPA attack was that the information about the secret key was difficult to directly observe,was proved to be incorrect.Finally,the static masking algorithm for modulo exponentiation of anti-SPA attack was also validated in this testing platform.…”
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Empirical Mode Decomposition and Neural Networks on FPGA for Fault Diagnosis in Induction Motors by David Camarena-Martinez, Martin Valtierra-Rodriguez, Arturo Garcia-Perez, Roque Alfredo Osornio-Rios, Rene de Jesus Romero-Troncoso

“…Moreover, the overall methodology implementation into a field-programmable gate array (FPGA) allows an online and real-time operation, thanks to its parallelism and high-performance capabilities as a system-on-a-chip (SoC) solution. …”
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Construindo o foragido: usos e sentidos da fuga no discurso judicial by Daniel Fonseca Fernandes

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Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems by Diana Göhringer, Jonathan Obie, André L. S. Braga, Michael Hübner, Carlos H. Llanos, Jürgen Becker

“…Such parameters are, for example, the number of processors and their configurations, the clock frequencies at design time, the use of dynamic frequency scaling at runtime, the application task distribution, and the FPGA type and size. The major contribution of this paper is the exploration of all these parameters and their impact on performance, power dissipation, and energy consumption for four different application scenarios. …”
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FPGA Techniques Based New Hybrid Modulation Strategies for Voltage Source Inverters by L. U. Sudha, J. Baskaran, S. A. Elankurisil

“…The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor. The feasibility of these modulation strategies is authenticated through simulation and experimental results.…”
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Autonomous Jerk Oscillator with Cosine Hyperbolic Nonlinearity: Analysis, FPGA Implementation, and Synchronization by Karthikeyan Rajagopal, Sifeu Takougang Kingni, Gaetan Fautso Kuiate, Victor Kamdoum Tamba, Viet-Thanh Pham

“…The proposed autonomous jerk oscillator is modelled on Field Programmable Gate Array (FPGA) and the FPGA chip statistics and phase portraits are derived. …”
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A Reinforcement Learning Based Approach for Efficient Routing in Multi-FPGA Platforms by Umer Farooq, Habib Mehrez, Najam Ul Hasan

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Effects of molybdenum to growth parameters and lipid content of two algae in Scenedesmaceae taxa by Celal Caner, Dilara Erdaği, Büşranur Şeker, Hüseyin Altundağ, Gizem Çeti̇n, Hatice Tunca

“…D. pannonicus and S. aldavei algae have bioremediation capabilities up to 1 mg mL−1 Na2MoO4 concentration. …”
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NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution by Kaveh Aasaraai, Andreas Moshovos

“…This work proposes NCOR, an FPGA-friendly non-blocking cache that exploits the key properties of Runahead execution. …”
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Modlitwa o dar rozeznawania woli Boga (Flp 1, 9–11) by Anna Emanuela Klich

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FPGA-Jetson based hardware real-time co-simulation for smart grid by Tong DUAN, Venkata Dinavahi, Tianshi CHENG

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A High-Level Synthesis Scheduling and Binding Heuristic for FPGA Fault Tolerance by David Wilson, Aniruddha Shastri, Greg Stitt

“…In this paper, we present a more transparent high-level synthesis approach that uses scheduling and binding to provide attractive tradeoffs between area, performance, and redundancy, while focusing on FPGA implementation considerations, such as resource realization costs, to produce more efficient architectures. …”
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