Designing of 2-Stage CPU Scheduler Using Vague Logic by Supriya Raheja, Reena Dhadich, Smita Rajpal

“…In operating system the CPU scheduler is designed in such a way that all the resources are fully utilized. …”
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Accelerating the SM3 hash algorithm with CPU‐FPGA Co‐Designed architecture by Xiaoying Huang, Zhichuan Guo, Mangu Song, Xuewen Zeng

“…However, the performance of implementation on the software architecture is not sufficient for high‐speed applications. This study proposes a CPU‐FPGA co‐designed architecture which offloads the SM3 function on field‐programmable gate array so that high throughput can be achieved. …”
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Cloud computing node based on Loongson multi-core CPU by Li RUAN, Guang-jun QIN, Li-min XIAO, Ming-fa ZHU

“…A cloud computing node based on Loongson multi-core CPUs was introduced.Both the design and implemen-tation methods of its hardware and software were introduced.Moreover,the prototype was successfully implemented.Experimental results show that one computing node of this system can achieve the performance of 0.256×10＜sup＞12＜/sup＞TFlops per second,42 1U ranks and 672 CPUs with 2688 CPU cores (672×4) in one cabinet.i.e.it is competing in metrics like Loongson multi-core CPU based,high performance with low power,high integration,etc.and lays a solid foundation for Loongson multi-core CPUs based cloud computing systems.…”
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Position Control of a 3-CPU Spherical Parallel Manipulator by Massimo Callegari, Luca Carbonari, Giacomo Palmieri, Matteo-Claudio Palpacelli, Donatello Tina

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Pasithea-1: An Energy-Efficient Sequential Reconfigurable Array With CPU-Like Programmability by Tobias Kaiser, Esther Gottschalk, Kai Biethahn, Friedel Gerfers

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High Performance Computing of Complex Electromagnetic Algorithms Based on GPU/CPU Heterogeneous Platform and Its Applications to EM Scattering and Multilayered Medium Structure by Zhe Song, Xing Mu, Hou-Xing Zhou

“…The fast and accurate numerical analysis for large-scale objects and complex structures is essential to electromagnetic simulation and design. Comparing to the exploration in EM algorithms from mathematical point of view, the computer programming realization is coordinately significant while keeping up with the development of hardware architectures. …”
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An Embedded Cloud Design for Internet-of-Things by Teemu Laukkarinen, Jukka Suhonen, Marko Hännikäinen

“…An embedded cloud design is presented that consists of distributable Process Description Language (PDL), Distributed Middleware (DiMiWa), and an infrastructure. …”
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Genetic analysis of scab disease resistance in common bean (Phaseolus vulgaris) varieties using GWAS and functional genomics approaches by Shadrack Odikara Oriama, Benard W. Kulohoma, Evans Nyaboga, Y. O. Masheti, Reuben Otsyula

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Network packet capture oriented INIC design and implementation by ZHANG Pan-yong1, WANG Da-wei1, ZENG Yu1, LI Jun1

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Architecture design of re-configurable convolutional neural network on software definition by Peijie LI, Li ZHANG, Yunfei XIA, Liming XU

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Performance evaluation of designated containerization and virtualization solutions using a synthetic benchmark by Sebastian Tarasiuk, Damian Traczuk, Kacper Szczepaniuk, Patryk Stoń, Jakub Smołka

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Compact software/hardware co-design and implementation method of Aigis-sig digital signature scheme by Zhen ZHOU, Debiao HE, Min LUO, Li LI

“…Digital signature scheme Aigis-sig, constructed on ideal lattice, takes the advantages of high efficiency, short signature length and resistant to quantum attack, etc.An optimized modular multiplication arithmetic component was constructed and a compact hardware architecture for polynomial operation over a ring based on number theory transformation (NTT) algorithm for Aigis-sig was designed.Besides, based on this architecture, software/hardware co-design and implementation for Aigis-sig scheme on FPGA platform in cryptography was proposed.Experimental results show that the speed of signature phase and verification phase are increased by about 26% and 17% respectively, compared with the pure software implementation on Xilinx Zynq-7000 SoC platform when CPU clock frequency and hardware clock frequency are set as 666.66MHz and 150 MHz respectively.…”
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Toward Fine-Grained Partitioning of Low-Level SRAM Caches for Emerging 3D-IC Designs by Sudipta Das, Bhawana Kumari, Siva Satyendra Sahoo, Yukai Chen, James Myers, Dragomir Milojevic, Dwaipayan Biswas, Julien Ryckaert

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Decoupling and Collaboration: An Intelligent Gateway-Based Internet of Things System Architecture for Meat Processing by Jun Liu, Chenggang Zhou, Haoyuan Wei, Jie Pi, Daoying Wang

“…This architecture is centered around an intelligently decoupled gateway design and edge-cloud collaborative intelligent meat inspection. …”
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SpecPCM: A Low-Power PCM-Based In-Memory Computing Accelerator for Full-Stack Mass Spectrometry Analysis by Keming Fan, Ashkan Moradifirouzabadi, Xiangjin Wu, Zheyu Li, Flavio Ponzina, Anton Persson, Eric Pop, Tajana Rosing, Mingu Kang

“…This article introduces SpecPCM, an in-memory computing (IMC) accelerator designed to achieve substantial improvements in energy and delay efficiency for both MS spectral clustering and database (DB) search. …”
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El Consejo Técnico Escolar como dispositivo formativo: la experiencia del ciclo escolar 2022-2023 by Graciela Cordero-Arroyo, María Guadalupe Tinajero Villavicencio, Roxana Patricia León González

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Investigation on the thermal characteristics of electronic system and prediction of chip temperature by machine learning by Fanyu Wang, Dongwei Wang, Qiang Deng, Hao Yan, Qi Chen, Yang Zhao

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Cloud Node Auto-Scaling System Automation Based on Computing Workload Prediction by Tri Fidrian Arya, Reza Fuad Rachmad, Achmad Affandi

“…This research uses machine learning to predict resource requirements based on workload work patterns and design an automatic scaling system. The dataset used includes features of node name, time, CPU usage percentage, and RAM usage. …”
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New construction of mutually orthogonal complementary sequence sets by LIU Kai, MENG Fanfei, PENG Peidong

“…Considering the suppression of peak-to-average power ratio (PAPR) in multi-carrier code division multiple access (MC-CDMA) systems, a class of CPU matrices with low column vector PAPR characteristics was designed using Boolean functions. …”
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Construction of Personalized Learning Platform Based on Intelligent Algorithm in the Context of Industry Education Integration by Zhifang Qian

“…In order to meet the personalized needs of different students and provide students with a variety of intelligent learning strategies and learning content, this research is aimed at the current lack of intelligent function design in the network teaching platform of colleges and universities. …”
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