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  1. 161

    Parallel complex event processing system based on S4 framework by Hao CHEN, Yu LI, Song-lin HU, Ying LIANG

    Published 2012-09-01
    Subjects: “…complex event processing…”
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    Article
  2. 162

    Optimizing Lattice Basis Reduction Algorithm on ARM V8 Processors by Ronghui Cao, Julong Wang, Liming Zheng, Jincheng Zhou, Haodong Wang, Tiaojie Xiao, Chunye Gong

    Published 2025-02-01
    “…Further assembly-level optimization fully utilizes the low-level instructions of the Phytium processor, and this increases execution speed. In terms of memory access, data prefetch techniques were then employed to load necessary data in advance before computation. …”
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  3. 163
  4. 164

    MatGeom: A toolbox for geometry processing with MATLAB by David Legland

    Published 2025-02-01
    Subjects: “…Geometry processing…”
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  5. 165

    An Efficient Biobjective Heuristic for Scheduling Workflows on Heterogeneous DVS-Enabled Processors by Pengji Zhou, Wei Zheng

    Published 2014-01-01
    “…In the context of scheduling, there have been increasing research interests on algorithms using dynamic voltage scaling (DVS), which allows processors to operate at lower voltage supply levels at the expense of sacrificing processing speed, to acquire a satisfactory trade-off between quality of schedule and energy consumption. …”
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  6. 166

    An Efficient Method for Mining Erasable Itemsets Using Multicore Processor Platform by Bao Huynh, Bay Vo

    Published 2018-01-01
    “…This method also solves some limitations of parallel computing approaches in communication, data transfers, and synchronization. …”
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  7. 167
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  9. 169

    Steam Computing Analysis and Application on Operator Real-time Signal Big Data Processing by Bin Dong, Di Yang, Zheng Wang, Wenhong Zhou

    Published 2015-10-01
    Subjects: “…big data;stream computing;Storm;real-time signal data processing…”
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    Article
  10. 170

    : Scalable and Energy-Efficient Processing of Continuous Range Queries for Location-Aware Mobile Computing by MoonBae Song

    Published 2015-10-01
    “…This work proposes a distributed sensing and monitoring technique (called Sleepwalk ) for continuous range queries with energy- and computation-efficient optimizations. In our scheme, each mobile client (MC) is aware of its nearby monitoring queries by leveraging its processing power. …”
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  11. 171
  12. 172

    A Matrix Method for Computing Process Networks Containing Multiple Nested Recycle Loops by Marcel T. Brodmann

    Published 1973-12-01
    “…The computation of such a process network typically involves iterative procedures, whereby each nested loop is often converged individually. …”
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  13. 173

    Analysis model of energy consumption variables for data processing in high-performance computing systems by Jorge Lozoya Arandia, Carlos Jesahel Vega Gómez, Lester Antonio Acevedo Montoya, Verónica Lizette Robles Dueñas

    Published 2024-06-01
    “…This article seeks to identify this series of processing and performance variables, which affect the energy consumption of HPC equipment, for the implemented computing architectures based on the analysis of performance models to obtain a general over-view of their effect on energy consumption in a case study to identify the behaviors of particular job assignment factors and provide an analysis of the energy consumption under particular conditions. …”
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  14. 174
  15. 175

    Krylov diagonalization of large many-body Hamiltonians on a quantum processor by Nobuyuki Yoshioka, Mirko Amico, William Kirby, Petar Jurcevic, Arkopal Dutt, Bryce Fuller, Shelly Garion, Holger Haas, Ikko Hamamura, Alexander Ivrii, Ritajit Majumdar, Zlatko Minev, Mario Motta, Bibek Pokharel, Pedro Rivero, Kunal Sharma, Christopher J. Wood, Ali Javadi-Abhari, Antonio Mezzacapo

    Published 2025-06-01
    “…Abstract The estimation of low energies of many-body systems is a cornerstone of the computational quantum sciences. Variational quantum algorithms can be used to prepare ground states on pre-fault-tolerant quantum processors, but their lack of convergence guarantees and impractical number of cost function estimations prevent systematic scaling of experiments to large systems. …”
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  16. 176
  17. 177

    A neuromorphic processor with on-chip learning for beyond-CMOS device integration by Hugh Greatorex, Ole Richter, Michele Mastella, Madison Cotteret, Philipp Klein, Maxime Fabre, Arianna Rubino, Willian Soares Girão, Junren Chen, Martin Ziegler, Laura Bégon-Lours, Giacomo Indiveri, Elisabetta Chicca

    Published 2025-07-01
    “…In this paper, we demonstrate the readiness of the architecture for device integration through comprehensive measurements and simulations. The processor provides a practical system for testing bio-inspired learning algorithms alongside emerging devices, establishing a tangible link between brain-inspired computation and cutting-edge device research.…”
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  18. 178

    Simulation of Thermal Energy Removal from Processors Using Air Coolers by G. A. Piskun, V. F. Alexeev, A. N. Belikov, D. G. Rybakov

    Published 2023-08-01
    “…In the last experiment, the optimal design of the AC was established, which made it possible to effectively implement the dissipation of thermal energy from the processor at various power levels. The necessity of using AC in such modern technical means as personal computers, servers, computer systems, etc., in which there are no restrictions on providing weight and size parameters has been experimentally proved.…”
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  19. 179

    A Processor-controlled Remote Updating Method for FPGA Configuration Files by WEN Fa, YIN Jun

    Published 2019-01-01
    “…Aiming at the inconvenience of updating configuration program in field application of FPGA, a remote configuration program updating method based on processor control was proposed. When the configuration program needs to be updated, the host computer downloads the configuration program to the SPI memory by the CPU’s communication interface. …”
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  20. 180

    Theoretical analysis for the data immigration between memory and processor percolation cache by Jiuchuan HU, Dongrui FAN, Jiancong CHENG, Long YAN, Xiaochun YE, Lingzhi LI, Liangyi WAN, Haibin ZHONG

    Published 2021-08-01
    “…To improve the computer processor’s memory access efficiency, increase hit rates, reduce data fetching latency, the data and instructors that had close relation with each other could build the just-in-time locality environment on processor’s cache.To build such an environment, the relations between the data and instructors should be studied while them being immigrated into on-chip cache.The research results show that these relations could be well kept when the data and instructors are moved.The simulation also shows that the percolation cache can help the processor core to increase its hit rates.These research results give a new way to build the just-in-time locality environment on the percolation cache.…”
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