Showing 161 - 180 results of 244 for search '"transistor"', query time: 0.05s Refine Results
  1. 161

    Field test of a silicon carbide metro propulsion system with reduced losses and acoustic noise by Martin Lindahl, Torbjörn Trostén, Daniel Jansson, Mikael H Johansson, Erik Velander, Anders Blomberg, Hans‐Peter Nee

    Published 2021-03-01
    “…Abstract Results are reported from a successful field test with a silicon carbide (SiC) metal‐oxide‐semiconductor field‐effect transistor (MOSFET) traction inverter. The train has been operated over a 3‐month period in the Stockholm metro system. …”
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  2. 162

    A compact active planar patch antenna array for sub-6 GHz 5G applications by Farid El Ghaoual, Jamal Zbitou, Mostafa Hefnawi, Aboubakr El Hammoumi

    Published 2025-03-01
    “…To further enhance the system's performance, the antenna array was integrated with a custom-designed power amplifier based on the BFP640ESD bipolar transistor. This integration enabled the achievement of an active antenna circuit, improving both transmission power and overall system efficiency. …”
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  3. 163

    The Application of Approximate Entropy Theory in Defects Detecting of IGBT Module by Shengqi Zhou, Luowei Zhou, Suncheng Liu, Pengju Sun, Quanming Luo, Junke Wu

    Published 2012-01-01
    “…Defect is one of the key factors in reducing the reliability of the insulated gate bipolar transistor (IGBT) module, so developing the diagnostic method for defects inside the IGBT module is an important measure to avoid catastrophic failure and improves the reliability of power electronic converters. …”
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  4. 164

    Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level by Km. Sucheta Singh, Satyendra Kumar, Saurabh Chaturvedi, Kapil Dev Tyagi, Vaibhav Bhushan Tyagi

    Published 2024-01-01
    “…This study explores the impact of integrating a gallium arsenide (GaAs) pocket at the source and drain in a dual-material gate-oxide-stack double-gate tunnel field-effect transistor (DMGOSDG-TFET). The performance of this DMGOSDG-TFET, employing work-function engineering and gate-oxide-stack techniques, is compared with a GaAs pocket-doped DMGOSDG-TFET. …”
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  5. 165

    Cryogenic Characterization of Low-Frequency Noise in 40-nm CMOS by Gerd Kiene, Sadik Ilik, Luigi Mastrodomenico, Masoud Babaie, Fabio Sebastiano

    Published 2024-01-01
    “…This paper presents an extensive characterization of the low-frequency noise (LFN) at room temperature (RT) and cryogenic temperature (4.2K) of 40-nm bulk-CMOS transistors. The noise is measured over a wide range of bias conditions and geometries to generate a comprehensive overview of LFN in this technology. …”
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  6. 166

    Epitaxial growth of transition metal nitrides by reactive sputtering by Florian Hörich, Christopher Lüttich, Jona Grümbel, Jürgen Bläsing, Martin Feneberg, Armin Dadgar, Rüdiger Goldhahn, André Strittmatter

    Published 2025-01-01
    “…As a prominent example, the integration of the group-III-transition metal nitride AlScN enabled an improved performance of GaN based transistor structures due to stronger polarization fields as has been recently demonstrated. …”
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  7. 167

    A RESEARCH ON SOCIAL MEDIA ADDICTION AND DOPAMINE DRIVEN FEEDBACK by Gamze Macit, Hüseyin Bilal Macit, Orhan Güngör

    Published 2018-12-01
    “…The great technological developments coming up to date and began with the invention of the transistor in the mid-20th century allowed the technological communication tools to enter through our pockets and caused great changes in the way of communication of the societies. …”
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    Article
  8. 168

    A four‐stage yield optimization technique for analog integrated circuits using optimal computing budget allocation and evolutionary algorithms by Abbas Yaseri, Mohammad Hossein Maghami, Mehdi Radmehr

    Published 2022-09-01
    “…In the Monte‐Carlo (MC) method, many transistor‐level simulations should be performed to obtain the desired result. …”
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    Article
  9. 169

    Design of a Novel W-Sinker RF LDMOS by Xiangming Xu, Han Yu, Jingfeng Huang, Chun Wang, Wei Ji, Zhengliang Zhou, Ying Cai, Yong Wang, Pingliang Li, Peng-Fei Wang, David Wei Zhang

    Published 2015-01-01
    “…Deep trench W-sinker (tungsten sinker) is employed in this technology to replace the traditional heavily doped diffusion sinker which can shrink chip size of the LDMOS transistor by more than 30% and improve power density. …”
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  10. 170

    Fully implantable, multi‐channel microstimulator with tracking supply ribbon, multi‐output charge pump and energy recovery by Amin Rashidi, Niloofar Yazdani, Amir M. Sodagar

    Published 2021-03-01
    “…Based on the proposed approach, a fully integrated 16‐channel stimulation backend for a visual prosthesis was designed and simulated in the transistor level in a standard 0.18‐μm triple‐well CMOS technology, occupying 1.41 mm2 of silicon area. …”
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  11. 171

    Ferroelectric memory: state-of-the-art manufacturing and research by D. A. Abdullaev, R. A. Milovanov, R. L. Volkov, N. I. Borgardt, A. N. Lantsev, K. A. Vorotilov, A. S. Sigov

    Published 2020-10-01
    “…New approaches to further scaling and new devices based on ferroelectrics are reviewed, including binary ferroelectrics deposited by ALD techniques, piezoelectronic transistors, ferroelectric/2D-semiconductor transistor structures, and others. …”
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  12. 172

    Design and Study of a Novel P-Type Junctionless FET for High Performance of CMOS Inverter by Bin Wang, Ziyuan Tang, Yuxiang Song, Lu Liu, Weitao Yang, Longsheng Wu

    Published 2025-01-01
    “…In this paper, a novel p-type junctionless field effect transistor (PJLFET) based on a partially depleted silicon-on-insulator (PD-SOI) is proposed and investigated. …”
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  13. 173

    A fault tolerant CSA in QCA technology for IoT devices by Saeid Seyedi, Hatam Abdoli

    Published 2025-01-01
    “…The most astonishing characteristic of this transistor-based CSA is its 85% tolerance for different types of failures. …”
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    Article
  14. 174

    A New Digital to Analog Converter Based on Low-Offset Bandgap Reference by Jinpeng Qiu, Tong Liu, Xubin Chen, Yongheng Shang, Jiongjiong Mo, Zhiyu Wang, Hua Chen, Jiarui Liu, Jingjing Lv, Faxin Yu

    Published 2017-01-01
    “…This paper presents a new 12-bit digital to analog converter (DAC) circuit based on a low-offset bandgap reference (BGR) circuit with two cascade transistor structure and two self-contained feedback low-offset operational amplifiers to reduce the effects of offset operational amplifier voltage effect on the reference voltage, PMOS current-mirror mismatch, and its channel modulation. …”
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  15. 175

    A low‐offset low‐power and high‐speed dynamic latch comparator with a preamplifier‐enhanced stage by Jérôme K. Folla, Maria L. Crespo, Evariste T. Wembe, Mohammad A. S. Bhuiyan, Andres Cicuttin, Bernard Z. Essimbi, Mamun B. I. Reaz

    Published 2021-01-01
    “…A custom latch structure with rigorous transistor sizing was implemented to avoid short circuit current and mismatch in the module. …”
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  16. 176

    Analog Replicator of Long Chaotic Radio Pulses for Coherent Processing by Lev Kuzmin, Elena Efremova, Pavel Vladyka, Vadim Itskov

    Published 2024-12-01
    “…The method can be implemented in various frequency ranges in the class of analog generators of chaotic oscillations, since the employed generation method, i.e., modulation of a transistor generator by supply voltage, is natural for radio engineering.…”
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  17. 177

    Boosting Parallel Applications Performance on Applying DIM Technique in a Multiprocessing Environment by Mateus B. Rutzig, Antonio C. S. Beck, Felipe Madruga, Marco A. Alves, Henrique C. Freitas, Nicolas Maillard, Philippe O. A. Navaux, Luigi Carro

    Published 2011-01-01
    “…Limits of instruction-level parallelism and higher transistor density sustain the increasing need for multiprocessor systems: they are rapidly taking over both general-purpose and embedded processor domains. …”
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  18. 178

    Delayered IC image analysis with template‐based Tanimoto Convolution and Morphological Decision by Deruo Cheng, Yiqiong Shi, Tong Lin, Bah‐Hwee Gwee, Kar‐Ann Toh

    Published 2022-03-01
    “…In this paper, we propose a template‐based Tanimoto Convolution and Morphological Decision (TCMD) model for transistor interconnection retrieval in delayered ICs, that is, poly line segmentation, with minimal human intervention. …”
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  19. 179

    IMPULSE CONTROL HYBRID ELECTRICAL SYSTEM by A. A. Lobaty, Yu. N. Petrenko, A. S. Abufanas, I. Elzein

    Published 2017-01-01
    “…The main problem in controlling this type converters is in their hybrid nature as the switched circuit topology entails different modes of operation, each of it with its own associated linear continuous-time dynamics.This paper analyses the modeling and controller synthesis of the fixed-frequency buck DC-DC converter, in which the transistor switch is operated by a pulse sequence with constant frequency. …”
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  20. 180

    Implementing Two Dimensions Decentralized Carrier Phase Shift Method for Multicell Serial-Parallel Inverters by Phu Cong Nguyen, Quoc Dung Phan, Tuyen Dinh Nguyen

    Published 2025-01-01
    “…The design of MMCs must ensure that the switching voltage is less than the switching voltage limit of the insulated gate bipolar transistor (IGBT), and that the 2D structure can easily adjust the voltage at each level by adding or removing several cells in series. …”
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