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261
Scaling Logic Area With Multitier Standard Cells
Published 2024-01-01“…To further increase the logic density, the international roadmap for devices and systems (IRDS) predicts a transition from a single layer of transistors per die to monolithically stacking transistors in multiple tiers starting in 2031. …”
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262
A New Junction Parameters Determination Using the Double Exponential Model
Published 2002-01-01“…An experimental test considers the emitter-base junction of bipolar transistors.…”
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263
Emergence of ferroelectricity in Sn-based perovskite semiconductor films by iminazole molecular reconfiguration
Published 2025-01-01“…Abstract Ferroelectric semiconductors have the advantages of switchable polarization ferroelectric field regulation and semiconductor transport characteristics, which are highly promising in ferroelectric transistors and nonvolatile memory. However, it is difficult to prepare a Sn-based perovskite film with both robust ferroelectric and semiconductor properties. …”
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264
CMOS Realization of All-Positive Pinched Hysteresis Loops
Published 2017-01-01“…These circuits employ two NMOS transistors, one of which operates in its triode region, in addition to two first-order filter sections. …”
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265
Impact of Strain on Sub-3 nm Gate-All-Around CMOS Logic Circuit Performance Using a Neural Compact Modeling Approach
Published 2024-01-01“…Impact of strain of sub-3 nm gate-all-around (GAA) CMOS transistors on the circuit performance is evaluated using a neural compact model. …”
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266
Analysis of thermal effects according to channel and drain contact metal distance
Published 2025-01-01“…Unlike conventional planar metal-oxide-semiconductor field-effect transistors (MOSFET), multi-gate devices such as fin field-effect transistors (FinFET) suffer from serious electrical performance issues due to the self-heating effect (SHE) because the channel is surrounded by the gate dielectric. …”
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267
Analog Low-Voltage Current-Mode Implementation of Digital Logic Gates
Published 2003-01-01“…By expanding the logic functions in power series expressions, and using summers and multipliers, realization of the basic logic functions is simplified. Since no transistors are working in saturation, the problem of fan-out is alleviated. …”
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268
A New Method for the Extraction of Diode Parameters Using a Single Exponential Model
Published 2000-01-01“…The method is applied to the characterization of the emitter-base junction of transistors and the results are discussed.…”
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269
Ultrasensitive Detection of 2,4-Dinitrophenol Using Nanowire Biosensor
Published 2018-01-01“…This method employs the sensors based on silicon nanowire field-effect transistors with protective layers of high-k dielectrics, whose surface is functionalized with an amino silane. …”
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270
Nanoscale air channel devices- inheritance and breakthrough of vacuum tube
Published 2024-12-01“…The NACDs are expected to surpass the physical limits of traditional solid transistors due to its advantages such as smaller heat loss, high-speed, resistance to harsh environments.…”
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271
Impact of the Gate Width of Al0.27Ga0.73N/AlN/Al0.04Ga0.96N/GaN HEMT on Its Characteristics
Published 2013-01-01“…This paper presents impact of layout sizes of Al0.27Ga0.73N/AlN/Al0.04Ga0.96N/GaN HEMT heterostructure high-mobility transistors (HEMTs) on SiC substrate on its characteristics that include the threshold voltage, the maximum transconductance, characteristic frequency, and the maximum oscillation frequency. …”
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272
Electronically Tunable Transimpedance Instrumentation Amplifier Based on OTRA
Published 2013-01-01“…The amplifier gain can be controlled electronically by implementing resistors using MOS transistors operating in linear region. The circuit can be made fully integrated. …”
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273
Design and Improvement of a Reversible SISO Shift Register with Quantum dot Cellular Automata
Published 2024-12-01“…Abstract Quantum dot cellular automata is one of the new nanotechnologies in computing systems having more potential for increasing speed, reducing the size and reducing power consumption in comparison with the current technology based on transistors. In this paper, we propose a novel reversible SISO shift register based on an optimized reversible D flip flop scheme in which the sequence of the flip flops is utilized to improve the evaluation criteria. …”
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274
Abnormal Temperature and Bias Dependence of Threshold Voltage Instability in p-GaN/AlGaN/GaN HEMTs
Published 2024-01-01“…In this work, we investigated the instability of threshold voltage (Vth) in p-GaN/AlGaN/GaN high electron mobility transistors (HEMTs) under positive gate biases and high temperatures. …”
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275
Charge-Based Compact Modeling of OECTs for Neuromorphic Applications
Published 2025-01-01“…Organic electrochemical transistors (OECTs) are a class of promising neuromorphic devices due to their exceptional conductivity, ease of fabrication, and cost-effectiveness. …”
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276
Wafer-Scale Monolithic Integration of LEDs with p-GaN-Depletion MOSFETs on a GaN LED Epitaxial Layer
Published 2024-01-01“…This work represents an important step towards the monolithic integration of LED and transistors for use in active-matrix micro-LED displays.…”
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277
Oxygen effect on the performance of β-Ga2O3 enhancement mode MOSFETs heteroepitaxially grown on a sapphire
Published 2025-03-01“…Enhancement-mode β-Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) were then fabricated with a gate-recessed process, incorporating a 5 µm gate field plate structure. …”
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278
A Novel LTPS-TFT Pixel Circuit to Compensate the Electronic Degradation for Active-Matrix Organic Light-Emitting Diode Displays
Published 2013-01-01“…A novel pixel driving circuit for active-matrix organic light-emitting diode (AMOLED) displays with low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs) is studied. The proposed compensation pixel circuit is driven by voltage programming scheme, which is composed of five TFTs and one capacitor, and has been certified to provide uniform output current by the Automatic Integrated Circuit Modeling Simulation Program with Integrated Circuit Emphasis (AIM-SPICE) simulator. …”
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279
A 0.69-mW Subsampling NB-IoT Receiver Employing a Linearized <italic>Q</italic>-Boosted LNA
Published 2024-01-01“…A direct-coupling derivative superposition technique where low-<inline-formula> <tex-math notation="LaTeX">$V_{t}$ </tex-math></inline-formula> and thick-gate transistors with opposite nonlinear characteristics are combined to improve the measured IIP3 by 7 dB to −18 dBm with little NF overhead. …”
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280
Out‐Diffusion and Uphill‐Diffusion of Mg in Czochralski‐Grown (100) β‐Ga2O3 Under High‐Temperature Annealing and Its Influence on Lateral MOSFET Devices
Published 2025-01-01“…Furthermore, significant differences in device performance are observed for power transistors fabricated on annealed and non‐annealed epitaxial β‐Ga2O3 wafers. …”
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