Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level by Km. Sucheta Singh, Satyendra Kumar, Saurabh Chaturvedi, Kapil Dev Tyagi, Vaibhav Bhushan Tyagi

“…This study explores the impact of integrating a gallium arsenide (GaAs) pocket at the source and drain in a dual-material gate-oxide-stack double-gate tunnel field-effect transistor (DMGOSDG-TFET). The performance of this DMGOSDG-TFET, employing work-function engineering and gate-oxide-stack techniques, is compared with a GaAs pocket-doped DMGOSDG-TFET. …”
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Cryogenic Characterization of Low-Frequency Noise in 40-nm CMOS by Gerd Kiene, Sadik Ilik, Luigi Mastrodomenico, Masoud Babaie, Fabio Sebastiano

“…This paper presents an extensive characterization of the low-frequency noise (LFN) at room temperature (RT) and cryogenic temperature (4.2K) of 40-nm bulk-CMOS transistors. The noise is measured over a wide range of bias conditions and geometries to generate a comprehensive overview of LFN in this technology. …”
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Epitaxial growth of transition metal nitrides by reactive sputtering by Florian Hörich, Christopher Lüttich, Jona Grümbel, Jürgen Bläsing, Martin Feneberg, Armin Dadgar, Rüdiger Goldhahn, André Strittmatter

“…As a prominent example, the integration of the group-III-transition metal nitride AlScN enabled an improved performance of GaN based transistor structures due to stronger polarization fields as has been recently demonstrated. …”
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A RESEARCH ON SOCIAL MEDIA ADDICTION AND DOPAMINE DRIVEN FEEDBACK by Gamze Macit, Hüseyin Bilal Macit, Orhan Güngör

“…The great technological developments coming up to date and began with the invention of the transistor in the mid-20th century allowed the technological communication tools to enter through our pockets and caused great changes in the way of communication of the societies. …”
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A four‐stage yield optimization technique for analog integrated circuits using optimal computing budget allocation and evolutionary algorithms by Abbas Yaseri, Mohammad Hossein Maghami, Mehdi Radmehr

“…In the Monte‐Carlo (MC) method, many transistor‐level simulations should be performed to obtain the desired result. …”
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Demonstration of high-reconfigurability and low-power strong physical unclonable function empowered by FeFET cycle-to-cycle variation and charge-domain computing by Taixin Li, Xinrui Guo, Franz Müller, Sukhrob Abdulazhanov, Xiaoyang Ma, Hongtao Zhong, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Kai Ni, Thomas Kämpfe, Xueqing Li

“…Here, we report a ferroelectric field-effect transistor (FeFET)-based strong PUF with high reconfigurability and low power, which leverages the FeFET cycle-to-cycle variation throughout the workflow and introduces charge-domain in-memory computing. …”
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Design of a Novel W-Sinker RF LDMOS by Xiangming Xu, Han Yu, Jingfeng Huang, Chun Wang, Wei Ji, Zhengliang Zhou, Ying Cai, Yong Wang, Pingliang Li, Peng-Fei Wang, David Wei Zhang

“…Deep trench W-sinker (tungsten sinker) is employed in this technology to replace the traditional heavily doped diffusion sinker which can shrink chip size of the LDMOS transistor by more than 30% and improve power density. …”
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Fully implantable, multi‐channel microstimulator with tracking supply ribbon, multi‐output charge pump and energy recovery by Amin Rashidi, Niloofar Yazdani, Amir M. Sodagar

“…Based on the proposed approach, a fully integrated 16‐channel stimulation backend for a visual prosthesis was designed and simulated in the transistor level in a standard 0.18‐μm triple‐well CMOS technology, occupying 1.41 mm2 of silicon area. …”
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Ferroelectric memory: state-of-the-art manufacturing and research by D. A. Abdullaev, R. A. Milovanov, R. L. Volkov, N. I. Borgardt, A. N. Lantsev, K. A. Vorotilov, A. S. Sigov

“…New approaches to further scaling and new devices based on ferroelectrics are reviewed, including binary ferroelectrics deposited by ALD techniques, piezoelectronic transistors, ferroelectric/2D-semiconductor transistor structures, and others. …”
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Design and Study of a Novel P-Type Junctionless FET for High Performance of CMOS Inverter by Bin Wang, Ziyuan Tang, Yuxiang Song, Lu Liu, Weitao Yang, Longsheng Wu

“…In this paper, a novel p-type junctionless field effect transistor (PJLFET) based on a partially depleted silicon-on-insulator (PD-SOI) is proposed and investigated. …”
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A lightweight multi scale fusion network for IGBT ultrasonic tomography image segmentation by Meng Song, Zhaoba Wang, Youxing Chen, Ya Li, Yong Jin, Bei Jia

“…Abstract The Insulated Gate Bipolar Transistor (IGBT) is a crucial power semiconductor device, and the integrity of its internal structure directly influences both its electrical performance and long-term reliability. …”
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A fault tolerant CSA in QCA technology for IoT devices by Saeid Seyedi, Hatam Abdoli

“…The most astonishing characteristic of this transistor-based CSA is its 85% tolerance for different types of failures. …”
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A New Digital to Analog Converter Based on Low-Offset Bandgap Reference by Jinpeng Qiu, Tong Liu, Xubin Chen, Yongheng Shang, Jiongjiong Mo, Zhiyu Wang, Hua Chen, Jiarui Liu, Jingjing Lv, Faxin Yu

“…This paper presents a new 12-bit digital to analog converter (DAC) circuit based on a low-offset bandgap reference (BGR) circuit with two cascade transistor structure and two self-contained feedback low-offset operational amplifiers to reduce the effects of offset operational amplifier voltage effect on the reference voltage, PMOS current-mirror mismatch, and its channel modulation. …”
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Research on battery balancing based on fuzzy model predictive control by Guangjun LIU, Yutao WANG, Liyang MA, Tiezhou WU, Aina TIAN

“…Then, based on FAMPC balancing control method, the duty cycle of the switching transistor was directly used as the system input. Finally, simulation experiments were conducted without employing additional current control mechanisms to change the battery pack state. …”
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A low‐offset low‐power and high‐speed dynamic latch comparator with a preamplifier‐enhanced stage by Jérôme K. Folla, Maria L. Crespo, Evariste T. Wembe, Mohammad A. S. Bhuiyan, Andres Cicuttin, Bernard Z. Essimbi, Mamun B. I. Reaz

“…A custom latch structure with rigorous transistor sizing was implemented to avoid short circuit current and mismatch in the module. …”
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Analog Replicator of Long Chaotic Radio Pulses for Coherent Processing by Lev Kuzmin, Elena Efremova, Pavel Vladyka, Vadim Itskov

“…The method can be implemented in various frequency ranges in the class of analog generators of chaotic oscillations, since the employed generation method, i.e., modulation of a transistor generator by supply voltage, is natural for radio engineering.…”
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Boosting Parallel Applications Performance on Applying DIM Technique in a Multiprocessing Environment by Mateus B. Rutzig, Antonio C. S. Beck, Felipe Madruga, Marco A. Alves, Henrique C. Freitas, Nicolas Maillard, Philippe O. A. Navaux, Luigi Carro

“…Limits of instruction-level parallelism and higher transistor density sustain the increasing need for multiprocessor systems: they are rapidly taking over both general-purpose and embedded processor domains. …”
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Delayered IC image analysis with template‐based Tanimoto Convolution and Morphological Decision by Deruo Cheng, Yiqiong Shi, Tong Lin, Bah‐Hwee Gwee, Kar‐Ann Toh

“…In this paper, we propose a template‐based Tanimoto Convolution and Morphological Decision (TCMD) model for transistor interconnection retrieval in delayered ICs, that is, poly line segmentation, with minimal human intervention. …”
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IMPULSE CONTROL HYBRID ELECTRICAL SYSTEM by A. A. Lobaty, Yu. N. Petrenko, A. S. Abufanas, I. Elzein

“…The main problem in controlling this type converters is in their hybrid nature as the switched circuit topology entails different modes of operation, each of it with its own associated linear continuous-time dynamics.This paper analyses the modeling and controller synthesis of the fixed-frequency buck DC-DC converter, in which the transistor switch is operated by a pulse sequence with constant frequency. …”
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Design Considerations for Sub-1-V 1T1C FeRAM Memory Circuits by Mohammad Adnaan, Sou-Chi Chang, Hai Li, Yu-Ching Liao, Ian A. Young, Azad Naeemi

“…We present a comprehensive benchmarking framework for one transistor-one capacitor (1T1C) low-voltage ferroelectric random access memory (FeRAM) circuits. …”
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