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41
On the Optimization and Parallelizing Little Algorithm for Solving the Traveling Salesman Problem
Published 2016-08-01Subjects: Get full text
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42
Enhancing Solar Convection Analysis With Multi‐Core Processors and GPUs
Published 2025-01-01Subjects: Get full text
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43
Verification of systems with behavior parallelism on the basis of the graph of reachable states
Published 2019-06-01Subjects: “…parallel algorithm…”
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44
Parallel Newtonian Optimization without Hessian Approximation
Published 2006-12-01Subjects: Get full text
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45
Comparative analysis of audio-MAE and MAE-AST models for real-time audio classification
Published 2025-07-01Subjects: Get full text
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46
Long Prediction Horizon FCS-MPC for Power Converters and Drives
Published 2023-01-01Subjects: Get full text
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47
Distributionally robust microgrid formation for service restoration in distribution systems against extended extreme events
Published 2025-08-01Subjects: Get full text
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48
Efficient GPU Implementation of the McMurchie–Davidson Method for Shell-Based ERI Computations
Published 2025-02-01Subjects: Get full text
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49
A Theoretical Bound Which Improves the Performance of Compilation-Based Multi-Agent Path Finding
Published 2025-01-01Subjects: “…Parallel algorithms…”
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50
GPU-Accelerated Fock Matrix Computation with Efficient Reduction
Published 2025-04-01Subjects: Get full text
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51
Application of Graphics Processor Unit Computing Resources to Solution of Incompressible Fluid Dynamics Problems
Published 2025-05-01Subjects: Get full text
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52
A parallel program for the simulation of flooding
Published 2025-07-01Subjects: Get full text
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53
Finding Multiple Optimal Solutions to an Integer Linear Program by Random Perturbations of Its Objective Function
Published 2025-03-01Subjects: Get full text
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54
Analysis of Algorithms for Detecting Users’ Behavioral Models based on Sessions Data
Published 2024-12-01Subjects: Get full text
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55
A Novel Method for Aircraft Structural Dynamic Strain Trend Signal Processing via Optimized Parallel Computing
Published 2024-10-01Subjects: Get full text
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56
On the resonances of an inhomogeneous dielectric ball, coated with graphene
Published 2025-03-01Subjects:Article -
57
TSC-IBR: A Variant of Interval-Based Memory Reclamation Using CPU’s Time-Stamp Counter
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58
IMPROVING THE EFFICIENCY OF THE METHOD OF SPECULATIVE MULTI-THREADING FOR DYNAMIC PARALLELIZING
Published 2016-08-01Subjects: Get full text
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59
ADVANCED SCHEDULER FOR COOPERATIVE EXECUTION OF THREADS ON MULTI-CORE SYSTEM
Published 2017-05-01Subjects: “…three architectures of the cooperative thread scheduler in a multithreaded application that is executed on a multi-core system are considered. architecture a0 is based on the synchronization and scheduling facilities, which are provided by the operating system. architecture a1 introduces a new synchronization primitive and a single queue of the blocked threads in the scheduler, which reduces the interaction activity between the threads and operating system, and significantly speed up the processes of blocking and unblocking the threads. architecture a2 replaces the single queue of blocked threads with dedicated queues, one for each of the synchronizing primitives, extends the number of internal states of the primitive, reduces the inter- dependence of the scheduling threads, and further significantly speeds up the processes of blocking and unblocking the threads. all scheduler architectures are implemented on windows operating systems and based on the user mode scheduling. important experimental results are obtained for multithreaded applications that implement two blocked parallel algorithms of solving the linear algebraic equation systems by the gaussian elimination. the algorithms differ in the way of the data distribution among threads and by the thread synchronization models. the number of threads varied from 32 to 7936. architecture a1 shows the acceleration of up to 8.65% and the architecture a2 shows the acceleration of up to 11.98% compared to a0 architecture for the blocked parallel algorithms computing the triangular form and performing the back substitution. on the back substitution stage of the algorithms, architecture a1 gives the acceleration of up to 125%, and architecture a2 gives the acceleration of up to 413% compared to architecture a0. the experiments clearly show that the proposed architectures, a1 and a2 outperform a0 depending on the number of thread blocking and unblocking operations, which happen during the execution of multi-threaded applications. the conducted computational experiments demonstrate the improvement of parameters of multithreaded applications on a heterogeneous multi-core system due the proposed advanced versions of the thread scheduler.…”
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Parallelization in combining the SOM and Sammon's mapping
Published 2003-12-01“… In this paper, we propose a parallel algorithm for multidimensional data visualization combining the neural network (the self-organizing map-SOM) and Sammon’s mapping. …”
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