CONCEPTUAL APPROACH TO SOLVING MANAGEMENT PROBLEMS OF THE UNIVERSITY by M. O. Shevchenko

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Research on <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML"> <msub> <mi>F</mi> <mrow> <msup> <mi>p</mi> <mn>2</mn> </msup> </mrow> </msub></math></in... by Zhanpeng JIANG, Mingwei SUN, Hai HUANG, Jiang XU, Zhiwei LIU, Rui BAI, Zhou FANG, Jiaxing QU

“…A quadratic extended-domain finely integrated operand scanning (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML"> <msub> <mi>F</mi> <mrow> <msup> <mi>p</mi> <mn>2</mn> </msup> </mrow> </msub> </math></inline-formula>-FIOS) modular multiplication algorithm for bilinear pairs was proposed to address the problem of low efficiency of bilinear pair operations.The algorithm effectively reduced the number of modular reductions in modular multiplication by optimizing the operation process of (AB+CD)mod P under the quadratic expansion domain.Two hardware architectures and their scheduling methods were designed to meet different application requirements.In order to improve the computational efficiency of the algorithm, the TSMC 55 nm process was used to realize the bilinear pairing operation unit.Compared with the existing literature, the designed architecture is superior to similar modular multiplication designs in performance indicators such as the first modular multiplication time, clock frequency and the area-time product, and also has certain advantages in the overall Optimal ate pair implementation.…”
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Pasithea-1: An Energy-Efficient Sequential Reconfigurable Array With CPU-Like Programmability by Tobias Kaiser, Esther Gottschalk, Kai Biethahn, Friedel Gerfers

“…Program-dependent factors underlying variations in energy efficiency are identified using dynamic program analysis. To reduce operand transfer energy, seven interconnect topologies are evaluated: a flat bus, five crossbar variants and a logarithmic network. …”
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Cognitive and Neural Differences in Exact and Approximate Arithmetic Using the Production Paradigm: An fNIRS Study by Tianqi Yue, Buxuan Guan, Yan Wu

“…Additionally, larger operands registered more brain activities in the R-DLPFC (right dorsolateral prefrontal cortex, CH4), R-SFG (right superior frontal gyrus, CH2), and PMC and SMA (pre- and supplementary motor cortexes, CH3) compared to smaller operands in approximate arithmetic. …”
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Improving dependability with low power fault detection model for skinny-hash. by Sonal Arvind Barge, Gerardine Immaculate Mary

“…Recomputing with complemented operands (RECO) and Double modular redundancy with complemented operands (DMRC) is proposed. …”
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Fraction Reduction in Membrane Systems by Ping Guo, Hong Zhang, Haizhu Chen, Ran Liu

“…Our work contributes to performing the rational computation in P systems since the rational operands can be given in the form of fraction.…”
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Coupled variable‐input LCG and clock divider‐based large period pseudo‐random bit generator on FPGA by Mangal D. Gupta, Rajeev K. Chauhan

“…First, a clock divider is utilised for generating a maximum length of 22n pseudorandom bits for n‐bit operands size which leads to lowering the hardware cost. …”
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A Low-Power DNN Accelerator With Mean-Error-Minimized Approximate Signed Multiplier by Laimin Du, Leibin Ni, Xiong Liu, Guanqi Peng, Kai Li, Wei Mao, Hao Yu

“…The probability-optimized compressor is customized for partial product matrix (PPM) of signed operands, which gets the optimal logic circuit after probabilistic analysis and optimization. …”
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