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  1. 1
    Multi‐precision binary multiplier architecture for multi‐precision floating‐point multiplication

    Multi‐precision binary multiplier architecture for multi‐precision floating‐point multiplication by Geetam Singh Tomar, Marcus Llyode George, Abhineet Singh Tomar

    Published 2021-08-01
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  2. 2
    A radix‐8 modulo 2n multiplier using area and power‐optimized hard multiple generator

    A radix‐8 modulo 2n multiplier using area and power‐optimized hard multiple generator by Naveen Kr. Kabra, Zuber M. Patel

    Published 2021-01-01
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