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1
A novel buffering fault‐tolerance approach for network on chip (NoC)
Published 2023-07-01Subjects: Get full text
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2
Accelerating the SM3 hash algorithm with CPU‐FPGA Co‐Designed architecture
Published 2021-11-01Subjects: Get full text
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3
A radix‐8 modulo 2n multiplier using area and power‐optimized hard multiple generator
Published 2021-01-01Subjects: Get full text
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