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Performance Evaluation of Page Migration Scheme for NVRAM-Based Wireless Sensor Nodes
Published 2013-11-01“…Some recent studies have shown that DRAM-based main memory spends a significant portion of the total system power. …”
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Optimization of data allocation in hierarchical memory for blocked shortest paths algorithms
Published 2021-10-01“…This paper is devoted to the reduction of data transfer between the main memory and direct mapped cache for blocked shortest paths algorithms (BSPA), which represent data by a D[M×M] matrix of blocks. …”
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NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution
Published 2012-01-01“…Soft processors often use data caches to reduce the gap between processor and main memory speeds. To achieve high efficiency, simple, blocking caches are used. …”
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A Self-Checking Hardware Journal for a Fault-Tolerant Processor Architecture
Published 2011-01-01“…The main memory, supposed to be fault secure in our model, only contains valid (uncorrupted) data obtained from fault-free computations. …”
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Ficções da memória ou a memória da ficção: Dulce María Loynaz e Cecília Meireles
Published 2012-01-01“…This article thinks about temporality, knowledge and gene- alogy, main memory’s functions, and examines Últimos días de una casa (1958) and Solombra (1963), poems-books on the problematic of the being in the temporality and the process of doing/undoing identity that occur, precisely, in the human time of memory. …”
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Pathway Detection from Protein Interaction Networks and Gene Expression Data Using Color-Coding Methods and A* Search Algorithms
Published 2012-01-01“…On the other hand, our method is more efficient than previous ones and detects the paths of length 10 within 40 seconds using CPU Intel 1.73GHz and 1GB main memory running under windows operating system.…”
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Mapping Iterative Medical Imaging Algorithm on Cell Accelerator
Published 2011-01-01“…We also experiment with various parameters, such as number of subsets, number of processing elements, and number of DMA transfers between main memory and local memory, that impact the performance of the algorithm.…”
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Expansion of Gammadelta T Cells from Cord Blood: A Therapeutical Possibility
Published 2018-01-01“…After culture, the cells had a polyclonal γδ T cell repertoire and the main memory subset was central memory (CD45RO+ CD27+). …”
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Optimization strategies for multi‐block structured CFD simulation based on Sunway TaihuLight
Published 2025-01-01“…In this article, we proposed several optimization strategies to improve the computing efficiency of multi‐block structured CFD simulation based on Sunway TaihuLight super computing system, including: (1) a load balancing decomposition approach combined with recursive segmentation of undirected graphs and block mapping for multi‐structured blocks, (2) two‐level parallelism that utilizes MPI + OpenACC2.0* hybrid parallel paradigms with various performance optimizations such as data preprocessing, reducing unnecessary loops of subroutine calls, collapse, and tile syntax, memory access optimization between the main memory and local data memory (LDM), and (3) a carefully orchestrated pipeline and register communication strategy between computing processor elements (CPEs) to tackle the dependence of LU‐SGS (Lower‐Upper Symmetric Gauss–Seidel). …”
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High Performance Frequent Subgraph Mining on Transaction Datasets: A Survey and Performance Comparison
Published 2019-09-01“…To tackle this problem, many main memory-based methods were proposed, which proved to be inefficient as the data size grew exponentially over time. …”
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