A–102-dBm Sensitivity Multichannel Heterodyne Wake-Up Receiver With Integrated ADPLL by Linsheng Zhang, Divya Duvvuri, Suprio Bhattacharya, Anjana Dissanayake, Xinjian Liu, Henry L. Bishop, Yaobin Zhang, Travis N. Blalock, Benton H. Calhoun, Steven M. Bowers

Subjects: “…All-digital phase-locked loop (ADPLL)…”
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Hybrid FOT2F-FOPD controller for permanent magnet synchronization motor based on ILA optimization with SRF-PLL by Mohamed Nouh, Belal A. Zalam, Amged Sayed

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Modelling and Extraction of Current Harmonic Components based on Instantaneous Power Theory for Shunt Active Filter under Weak Grid by Farzad Sajadi, Mohammad Pichan, Adel Zakipour

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Millimeter-Wave All-Digital Phase-Locked Loop Using Reference Waveform Oversampling Techniques by Teerachot Siriburanon, Chunxiao Liu, Jianglin Du, Robert Bogdan Staszewski

Subjects: “…All-digital phase-locked loop (ADPLL)…”
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Nonlinearity-Induced Spur Analysis in Fractional-<italic>N</italic> Synthesizers With &#x0394;&#x03A3; Quantization Cancellation by Yizhe Hu, Weichen Tao, Robert Bogdan Staszewski

Subjects: “…All-digital phase-locked loop (ADPLL)…”
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