Showing 1 - 2 results of 2 for search '"instruction-level parallelism"', query time: 0.07s Refine Results
  1. 1

    Boosting Parallel Applications Performance on Applying DIM Technique in a Multiprocessing Environment by Mateus B. Rutzig, Antonio C. S. Beck, Felipe Madruga, Marco A. Alves, Henrique C. Freitas, Nicolas Maillard, Philippe O. A. Navaux, Luigi Carro

    Published 2011-01-01
    “…Limits of instruction-level parallelism and higher transistor density sustain the increasing need for multiprocessor systems: they are rapidly taking over both general-purpose and embedded processor domains. …”
    Get full text
    Article
  2. 2

    The Potential for a GPU-Like Overlay Architecture for FPGAs by Jeffrey Kingyens, J. Gregory Steffan

    Published 2011-01-01
    “…The key new contributions of our architecture are mechanisms for managing threads and register files that maximize data-level and instruction-level parallelism while overcoming the challenges of port limitations of FPGA block memories as well as memory and pipeline latency. …”
    Get full text
    Article