Showing 1 - 3 results of 3 for search '"full-adder"', query time: 0.03s Refine Results
  1. 1
    Ternary Toward Binary: Circuit-Level Implementation of Ternary Logic Using Depletion-Mode and Conventional MOSFETs

    Ternary Toward Binary: Circuit-Level Implementation of Ternary Logic Using Depletion-Mode and Conventional MOSFETs by Hyundong Lee, Seonghoon Kim, Jongbeom Kim, Jaehoon Jeong, Jeonggyu Yang, Taigon Song

    Published 2025-01-01
    Subjects:
    Get full text
    Article
    Save to List
    Saved in:
  2. 2
    A Multiplier-Less Discrete Cosine Transform Architecture Using a Majority Logic-Based Approximate Full Adder

    A Multiplier-Less Discrete Cosine Transform Architecture Using a Majority Logic-Based Approximate Full Adder by Elham Esmaeili, Farshad Pesaran, Nabiollah Shiri

    Published 2024-03-01
    Subjects:
    Get full text
    Article
    Save to List
    Saved in:
  3. 3
    Evaluation of Temperature, Disturbance and Noise Effect in Full Adders Based on GDI Method

    Evaluation of Temperature, Disturbance and Noise Effect in Full Adders Based on GDI Method by Hashem Arfavi, Seyed Mohammadali Riazi, Roozbeh Hamzehyan

    Published 2024-02-01
    Subjects:
    Get full text
    Article
    Save to List
    Saved in:

Search Tools: