Low-latency hierarchical routing of reconfigurable neuromorphic systems by Samalika Perera, Ying Xu, André van Schaik, Runchun Wang

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A Reinforcement Learning Based Approach for Efficient Routing in Multi-FPGA Platforms by Umer Farooq, Habib Mehrez, Najam Ul Hasan

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Design and hardware implementation of a CAN communication protocol by NI Jiang-qun, TANG Cheng-pei, ZHANG Dong, FENG Guo-cong

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Reconfigurable buffer mechanism in switch fabric design by Hui-qun HUANG, Qin-rang LIU, You-jun BU, Feng-yu ZHANG

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Survey of FPGA based recurrent neural network accelerator by Chen GAO, Fan ZHANG

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Implementation of Simplified Data Encryption Standard on FPGA using VHDL by salim Qadir Mohammed

Subjects: “…Cryptography, DES, S-DES, FPGA, VHDL…”
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A Hardware Accelerator for the Inference of a Convolutional Neural network by Edwin González, Walter D. Villamizar Luna, Carlos Augusto Fajardo Ariza

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Co-decode algorithm of network coding with hardware logic by Hui LI, Ming-long ZHANG, Fu-xing CHEN, Han-xu HOU, Kai PAN, Wei WANG, Hu-sheng YUAN, Tao SUN

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Digital circuit for switch contact bounce analysis by A. A. Ivaniuk, D. O. Mozhejko

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Software-defined protocol independent parser based on FPGA by Lixin MIAO, Qinrang LIU, Xin WANG

Subjects: “…FPGA…”
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FPGA-QNN: Quantized Neural Network Hardware Acceleration on FPGAs by Mustafa Tasci, Ayhan Istanbullu, Vedat Tumen, Selahattin Kosunalp

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Optimizing FPGA Resource Allocation for SHA-3 Using DSP48 and Pipelining Techniques by Agfianto Eko Putra, Oskar Natan, Jazi Eko Istiyanto

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Design and realization of a high-speed traffic collection and processing scheme for campus networks using FPGA by YAO Renlong, ZHAO Qiong, HE Haitao, WEI Yujun, LI Enlei

Subjects: “…FPGA…”
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Sketch-based data plane hardware model for software-defined measurement by Mian DAI, Guang CHENG

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A VHDL Code for Offset Pulse Position Modulation Working with Reed Solomon System by Using ModelSim by Ahmed H. Albatoosh, Mohamed Ibrahim Shuja'a, Basman M. Al-Nedawe

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Development and testing of a dual-frequency real-time hardware feedback system for the hard X-ray nanoprobe beamline of the SSRF by Zhisen Jiang, Hui Jiang, Yinghua He, Yan He, Dongxu Liang, Huaina Yu, Aiguo Li, Riccardo Signorato

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Performance Evaluation of FPGA-Based Design of Modified Chua Oscillator by Filips Capligins, İsmail Koyuncu, Anna Litvinenko, Muhammed Furkan Taşdemir

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Implementation of SM3 algorithm based on SoPC component by Meng-li SHAO, Xin-chun YIN, Yan-mei LI

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Design of Network Service Transmission with LDPC Coding in Space Laser Communication by ZHANG Xiaole, TAN Xiaochuan, LI Zhe

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Source-controlled OpenFlow data plane by Zhe WANG, Man-gui LIANG, Xiao-meng JI, MateusAbisai Fillipus

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