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A Vector-Like Reconfigurable Floating-Point Unit for the Logarithm
Published 2011-01-01“…The use of reconfigurable computing for accelerating floating-point intensive codes is becoming common due to the availability of DSPs in new-generation FPGAs. …”
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Development of Floating-Point MAC Engine for 2-D Convolution of Image
Published 2021-01-01“…This paper proposes a single-precision Floating Point MAC engine to accelerate the sliding window algorithm for the 2-D convolution of image. …”
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Multi‐precision binary multiplier architecture for multi‐precision floating‐point multiplication
Published 2021-08-01Subjects: Get full text
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FPGA‐based implementation of floating point processing element for the design of efficient FIR filters
Published 2021-07-01Subjects: Get full text
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The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units
Published 2008-01-01“…Specifically, it presents an empirical study that covers the location, pin arrangement, and interconnect between embedded floating point units (FPUs) and the fine-grained logic fabric in FPGAs. …”
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A Decimal Floating-Point Accurate Scalar Product Unit with a Parallel Fixed-Point Multiplier on a Virtex-5 FPGA
Published 2010-01-01“…Decimal Floating Point operations are important for applications that cannot tolerate errors from conversions between binary and decimal formats, for instance, commercial, financial, and insurance applications. …”
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Fast and low‐power leading‐one detectors for energy‐efficient logarithmic computing
Published 2021-07-01Subjects: Get full text
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Performance Evaluation of FPGA-Based Design of Modified Chua Oscillator
Published 2024-11-01“…One of the most essential structures in chaotic systems is chaotic oscillator which generates chaotic signals. IQ-Math and floating point number systems are one of the preferred number standards. …”
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On Accuracy of Testing Decryption Failure Rate for Encryption Schemes under the LWE Assumption
Published 2024-01-01“…Therein explicit criteria are given to select the floating-point datatype and to decide which small probabilities should be abandoned. …”
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The Potential for a GPU-Like Overlay Architecture for FPGAs
Published 2011-01-01“…In particular, our soft processor architecture exploits multithreading, vector operations, and predication to supply a floating-point pipeline of 64 stages via hardware support for up to 256 concurrent thread contexts. …”
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Sector determination for SVPWM based four‐switch three‐phase VSI
Published 2017-03-01“…The proposed method has been simulated by using MATLAB/Simulink and implemented using a VSI with a TMS320F28335 floating‐point digital signal processing. Simulation and experimental results show the feasibility and effectiveness of the proposed SVPWM algorithm for FSTP inverter.…”
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Accurate Evaluation of Polynomials in Legendre Basis
Published 2014-01-01“…Since the coefficients of the evaluated polynomial are fractions, we propose to store these coefficients in two floating point numbers, such as double-double format, to reduce the effect of the coefficients’ perturbation. …”
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CSGD-YOLO: A Corn Seed Germination Status Detection Model Based on YOLOv8n
Published 2025-01-01“…Compared with the YOLO v8n, CSGD-YOLO improves performance in terms of accuracy, model size, parameter number, and floating-point operation counts by 1.39, 1.43, 1.77, and 2.95 percentage points, respectively. …”
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A Domain-Specific Architecture for Elementary Function Evaluation
Published 2015-01-01“…Two new instructions are required, a table lookup instruction and an extended-precision floating-point multiply-add instruction with special treatment for exceptional inputs. …”
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Theoretical understanding of gradients of spike functions as boolean functions
Published 2024-11-01“…In this regard, we propose a method to evaluate the gradient of spike function viewed as a Boolean function for fixed- and floating-point data formats. For both formats, the gradient is considerably similar to a delta function that peaks at the threshold for spiking, which justifies the approximation of the spike function to the Heaviside step function. …”
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Image Super-Resolution Reconstruction Based on the Lightweight Hybrid Attention Network
Published 2024-01-01“…In addition, the parameter amount and calculation amount (floating point operations (FLOPs)) of our method are reduced by 315K and 16.4 G, respectively. …”
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Revisiting a Cutting-Plane Method for Perfect Matchings
Published 2020-12-01“…On large graphs (roughly $m>100$), these perturbations lead to cost values that exceed the precision of floating-point formats used by typical linear programming solvers for numerical calculations. …”
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A lightweight power quality disturbance recognition model based on CNN and Transformer
Published 2025-01-01“…Simulation experiments demonstrate that the CaT model effectively recognizes PQDs with fewer parameters and floating point operations, achieving high accuracy and strong noise robustness. …”
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Enhanced Neural Architecture for Real-Time Deep Learning Wavefront Sensing
Published 2025-01-01“…We introduce a novel multi-objective neural architecture search (MNAS) method designed to attain Pareto optimality in terms of error and floating-point operations (FLOPs) for the WFSNet. Utilizing EfficientNet-B0 prototypes, we propose a WFSNet with enhanced neural architecture which significantly reduces computational costs by 80% while improving wavefront sensing accuracy by 22%. …”
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