Digital circuit for switch contact bounce analysis by A. A. Ivaniuk, D. O. Mozhejko

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Versatile Packaging Concept Using Thick Film Hybrids for Analog and Digital Circuits by Ch. Zimmer

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Hardware Efficient Speech Enhancement With Noise Aware Multi-Target Deep Learning by Salinna Abdullah, Majid Zamani, Andreas Demosthenous

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Wu’s Characteristic Set Method for SystemVerilog Assertions Verification by Xinyan Gao, Ning Zhou, Jinzhao Wu, Dakui Li

“…We propose a verification solution based on characteristic set of Wu’s method towards SystemVerilog assertion checking over digital circuit systems. We define a suitable subset of SVAs so that an efficient polynomial modeling mechanism for both circuit descriptions and assertions can be applied. …”
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Complex Dynamic Analysis, Circuit Design and Simplified Predefined Time Synchronization for a Jerk Absolute Memristor Chaotic System by Jindong Liu, Zhen Wang, Huaigu Tian, Fei Xie

“…For the feasibility of practical application, the analog circuit and FPGA digital circuit are designed. Finally, a simplified predefined time synchronization scheme is proposed; comparing with the full control input synchronization scheme, the simplified predefined time synchronization scheme can not only reduce the controller inputs but also predefine the synchronization time.…”
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Macromodel of Precise Signal-Phase Meter by Matej Šalamon, Bojan Jarc

“…The development of a signal conditioning circuit requires precise measurements of small signal phases, amplitudes and offsets using the analog/digital circuit simulator. The phase measurement cannot be performed directly with a simulator, therefore an appropriate macro-model is needed for a circuit simulator. …”
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Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions by Ning Zhou, Xinyan Gao, Jinzhao Wu, Jianchao Wei, Dakui Li

“…We introduce an approach exploiting the power of polynomial ring algebra to perform SystemVerilog assertion verification over digital circuit systems. This method is based on Groebner bases theory and sequential properties checking. …”
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Physically non-cloneable arbiter-type function with non-linear path pairs by A. A. Ivaniuk, A. Y. Shamyna

“…Generally, PUF are digital circuits that extract such variations and convert them into a binary format, which applied for further use. …”
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C3-VQA: Cryogenic Counter-Based Coprocessor for Variational Quantum Algorithms by Yosuke Ueno, Satoshi Imamura, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura

“…The C3-VQA utilizes single-flux-quantum logic, which is an ultralow-power superconducting digital circuit that operates at the 4 K environment. …”
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Multi-Dimensional Operator of O.Heavyside and Synthesis of Electric Circuits by A. V. Bondarenko, V. V. Rеznichenko, K. A. Malygine, V. V. Bondarenko, V. I. Mozhar

“…The paper proposes synthesis of multi-dimensional, multi-pole, non-linear, parametric, analogous or analogue-digital circuits and systems with the help of multi-dimensional operator of O.Heavyside.The proposed method of synthesis is illustrated by realization of a dynamic corrector.…”
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Constructing Digitized Chaotic Time Series with a Guaranteed Enhanced Period by Chuanfu Wang, Qun Ding

“…When chaotic systems are realized in digital circuits, their chaotic behavior will degenerate into short periodic behavior. …”
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Reduced-Precision Redundancy on FPGAs by Brian Pratt, Megan Fuller, Michael Wirthlin

“…Reduced-precision redundancy (RPR) has been shown to be a viable alternative to triple modular redundancy (TMR) for digital circuits. This paper builds on previous research by offering a detailed analysis of the implementation of RPR on FPGAs to improve reliability in soft error environments. …”
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A Compact and Fast Resonant Cavity-Based Encoder in Photonic Crystal Platform by Mohammad Soroosh, Faris K. AL-Shammri, Mohammad Javad Maleki, Venkatachalam Rajarajan Balaji, Ehsan Adibnia

“…These advancements hold significant potential for enhancing the performance of compact, high-speed digital circuits.…”
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A Design of Fault-Tolerant Battery Monitoring IC for Electric Vehicles Complying With ISO 26262 by Byambajav Ragchaa, Liji Wu, Xiangmin Zhang

“…In this paper, we aim to enhance the reliability and robustness of the BMIC by implementing fault detection mechanisms within its circuits and incorporating fault recovery functionalities through digital circuits. To meet safety requirements, this paper adheres to the functional safety standard ISO 26262 for road vehicles. …”
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Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions by Bahram N. Uchevler, Kjetil Svarstad

“…With the increasing design and production costs and long time-to-market for Application Specific Integrated Circuits (ASICs), implementing digital circuits on reconfigurable hardware is becoming a more common practice. …”
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V2Va +: An Efficient SystemVerilog & Verilog-to-Verilog-A Translator for Accelerated Mixed-Signal Simulation by Chao Wang, Yicong Shao, Jiajie Huang, Wangzilu Lu, Zhiwen Gu, Longfan Li, Yuhang Zhang, Jian Zhao, Wei Mao, Yongfu Li

“…This paper introduces a streamlined SystemVerilog & Verilog-to-Verilog-A (V2Va +) translation tool that automates the conversion of synthesizable SystemVerilog and Verilog code into Verilog-A code, enabling concurrent simulation of analog and digital circuits. Through a set of mapping rules, V2Va + facilitates mixed-signal simulations in an analog environment, negating the requirement for a separate mixed-signal simulation engine and overcoming multiple types of EDA licensing obstacles. …”
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A Low-Power DNN Accelerator With Mean-Error-Minimized Approximate Signed Multiplier by Laimin Du, Leibin Ni, Xiong Liu, Guanqi Peng, Kai Li, Wei Mao, Hao Yu

“…Approximate computing is an emerging and effective method for reducing energy consumption in digital circuits, which is critical for energy-efficient performance improvement of edge-computing devices. …”
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A fault tolerant CSA in QCA technology for IoT devices by Saeid Seyedi, Hatam Abdoli

“…The proposed CSA will increase the robustness and reliability of QCA-based digital circuits by integrating fault tolerance into its design such that the circuitry based on QCA can keep their functionality on even in fault-prone environments.…”
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Design and evaluation of clock-gating-based approximate multiplier for error-tolerant applications by Venkata Sudhakar Chowdam, Suresh Babu Potladurty, Prasad Reddy karipireddy

“…Although approximation arithmetic affects the output accuracy in multipliers, it offers a realistic avenue for constructing power-, area--, and speed-efficient digital circuits. The approximation computing technique is commonly used in error-tolerant applications such as signal, image, and video processing. …”
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