Enhancing DNN Computational Efficiency via Decomposition and Approximation by Ori Schweitzer, Uri Weiser, Freddy Gabbay

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Computing with electromagnetic fields rather than binary digits: a route towards artificial general intelligence and conscious AI by Johnjoe McFadden

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A Processing in Memory Realization Using Quantum Dot Cellular Automata (QCA): Proposal and Implementation by P.P. Chougule, B. Sen, R. Mukherjee, P.S. Patil, R.K. Kamat, T.D. Dongale

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Development Status and Trends of Space Processor by Zhigang YU, Xu FENG, Zhou LU, Jixing GAO, Wenhui DING

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Simulators for Processors Used in Virtualization: A Survey by Swapneel C. Mhatre, Priya Chandran

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Protocol of GIOP onto RapidIO——RIO-IOP by Wen-yu CHEN, Ru ZENG, Wei PI, Wen LI

Subjects: “…computer architecture…”
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An integrated taxonomy of standard indicators for ranking and selecting supercomputers by Davood Maleki, Alireza Mansouri, Ehsan Arianyan

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Bridging Physical and Digital Realms: An Innovative AI-Driven Methodology for Architectural Conceptualization by Ayman Assem

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Automatic Generation of Simulators for Processors Enhanced for Security in Virtualization by Swapneel C. Mhatre, Priya Chandran

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ALCEA: The Architecture Life-Cycle Effect Analysis Method by Jakob Axelsson, Damir Bilic, Daniel Brahneborg, Joakim Froberg, Henrik Gustavsson, Robbert Jongeling, Daniel Sundmark

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Research and implementation of network transmission situation awareness by ZHUO Ying, GONG Chun-ye, GONG Zheng-hu

Subjects: “…computer architecture…”
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BTCP: Binary Temporal Convolutional Network-Based Data Prefetcher for Low Inference Latency and Storage Overhead by Chang Ho Ryu, Tae Hee Han

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Hardware-accelerated real-time IP flow measurement method for multi-core architecture by ZHU Chao1, XIE Ying-ke1, WANG Jian-dong1, ZHAO Zi-li1, HAN Cheng-de1

Subjects: “…computer architecture;network measurement;hardware acceleration;IP flow;multi-core architecture;FPGA…”
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A Real-Time Trust Management Model Using Digital Twin in IoT Networks by Meriem Soula, Bacem Mbarek, Aref Meddeb

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Towards a quantum synapse for quantum sensing by L-F Pau

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A special machine for solving NP-complete problems by Jin Xu, Le Yu, Huihui Yang, Siyuan Ji, Pu Wu, Yu Zhang, Anqi Yang, Quanyou Li, Haisheng Li, Enqiang Zhu, Xiaolong Shi, Zehui Shao, Huang Leng, Xiaoqing Liu

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Pasithea-1: An Energy-Efficient Sequential Reconfigurable Array With CPU-Like Programmability by Tobias Kaiser, Esther Gottschalk, Kai Biethahn, Friedel Gerfers

Subjects: “…Computer architecture…”
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An Evaluation of the Security of Bare Machine Computing (BMC) Systems against Cybersecurity Attacks by Fahad Alotaibi, Ramesh K. Karne, Alexander L. Wijesinha, Nirmala Soundararajan, Abhishek Rangi

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Computer Architecture for Industrial Training Evaluation by Luz E. Gutiérrez, Carlos A. Guerrero, Mark M. Betts, Daladier Jabba, Wilson Nieto, Héctor A. López-Ospina

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Event‐based high throughput computing: A series of case studies on a massively parallel softcore machine by Mark Vousden, Jordan Morris, Graeme McLachlan Bragg, Jonathan Beaumont, Ashur Rafiev, Wayne Luk, David Thomas, Andrew Brown

Subjects: “…computer architecture…”
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