LONGITUDINAL VIBRATION CHARACTERISTICS OF DRILL BIT IN DRILLING RIG INFLUENCE ON WEAR AND MECHANISM OF TOOTH WHEEL END by XIE Miao, LI ChenGuang, LI Cui, ZHANG HongYu

Subjects: “…Roller bit…”
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ANOVA OPTIMIZATION OF DRILL BIT TEMPERATURE IN DRILLING OF PURE AND CARBON BLACK REINFORCED HIGH DENSITY POLYETHYLENE by ALPER UYSAL

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Bit selection method based on the rock drillability characteristics and principal component analysis of rock-breaking indicators by Yang Hu, Xian Xinlong, Zhou Penggao, Li Zhen, Wei Ruihua, Liang Junqiao, Xiong Shilong

Subjects: “…Bit selection…”
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Robust Signature-Based Copyright Protection Scheme Using the Most Significant Gray-Scale Bits of the Image by Mohammad Awrangjeb

“…The most significant bit- (MSB-) plane of an image is least likely to change by the most signal processing operations. …”
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Erasure channel modelling–based secure bit allocation schemes for multipath routing in wireless sensor networks by Zhenhua Yuan, Chen Chen, Ye Jin

“…Based on the binary erasure channel model, the problem of multipath routing degrades to a problem of bit allocation for each path. We formulate the problems and find that the problems are both quasi-convex. …”
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Golden code based transmission schemes and decoding methods for MIMO downlink system with finite-bit feedback by Sisi ZHENG, Haiquan WANG, Guobin LI, Tanming DAI

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Optimized PFA algorithm in GPS software receiver by Xiang-zhen YAO, Shao-long CUI, Jin-yun FANG

Subjects: “…2bit quantization…”
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A New Physical Layer Security Scheme Based on Adaptive Bit Channel Selection for Polar-Coded OFDM by Yuki Kuraya, Hideki Ochiai

“…Our approach is based on the <italic>adaptive bit channel selection</italic>, where the input bit channels of polar code are selected according to the frequency selectivity of the main channel. …”
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Coupled variable‐input LCG and clock divider‐based large period pseudo‐random bit generator on FPGA by Mangal D. Gupta, Rajeev K. Chauhan

“…Abstract The authors present a new method for the generation of pseudorandom bits, based on coupled variable input linear congruential generator (LCG) and a clock divider. …”
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A Bit-Parallel Tabu Search Algorithm for Finding Es2-Optimal and Minimax-Optimal Supersaturated Designs by Luis B. Morales, Dursun A. Bulutoglu

“…This allows developing a bit-parallel tabu search (TS) algorithm. The TS algorithm found Es2-optimal and minimax-optimal SSDs achieving the sharpest known Es2 lower bound with smax∈2,4,6 of sizes N,m=16,25, (16, 26), (16, 27), (18, 23), (18, 24), (18, 25), (18, 26), (18, 27), (18, 28), (18, 29), (20, 21), (22, 22), (22, 23), (24, 24), and (24, 25). …”
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Geometric Evolvement, Simulation, and Test of a Bionic Lateral PDC Reamer Bit Inspired by Capra sibirica Horn by Chaoyu Chen, Jialin Yan, Yuntian Zou, Haifeng Luo

“…PDC (polycrystalline diamond compact) bit is the key equipment for drilling holes inside the rock in oil and mining industry. …”
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A Low-Complexity Diversity-Preserving Universal Bit-Flipping Enhanced Hard Decision Decoder for Arbitrary Linear Codes by Praveen Sai Bere, Mohammed Zafar Ali Khan, Lajos Hanzo

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A 0.002‐mm2 8‐bit 1‐MS/s low‐power time‐based DAC (T‐DAC) by Ali H. Hassan, Hassan Mostafa, Mohamed Refky, Khaled N. Salama, Ahmed M. Soliman

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‘There’s a Little Bit of Tension There’: perspectives of mothers and early childhood educators on breast-feeding in child care centers by Jill R Demirci, Rachel Dieterich, Melissa Glasser, Caroline Harpel, Timothy Shope

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All-optical pattern matching system of 42 Gbit/s 4-bit BPSK signals and its demonstration for optoelectronic firewall by Qihan ZHANG, Xiaoxue GONG, Rui LI, Xin LI, Shanguo HUANG, Lei GUO

“…To achieve the all-optical pattern matching for optoelectronic firewall which could process high-speed optical signals efficiently, a BPSK all-optical pattern recognition system with the data rate up to 42 Gbit/s was proposed and demonstrated by employing the commercial optical components.First, the input BPSK sequence was converted to a positive and a negative IM signals by adding in-phase and inverse-phase coherent carriers, respectively.Then the converted IM signals were coupled into time delay lines and optical AND logic gates implemented by HNLF to achieve the optical correlation operation.In the end, a high-level optical pulse indicating the pattern matched result was output.The numerical simulation and the experiment results demonstrate that the proposed system can recognize a 4-bit target BPSK sequence from an 8-bit 42 Gbit/s BPSK input sequence, which proves the feasibility of the all-optical pattern matching of BPSK signals and can be applied to high-speed optoelectronic firewall.…”
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Transmit waveform and receive filter design for multiple‐input multiple‐output radar with one‐bit digital‐to‐analogue converters by Huan Wan, Zhi Quan, Bin Liao

“…Abstract In this paper, we investigate the joint design of transmit waveform and receive filter for colocated Multiple‐Input Multiple‐Output radar equipped with one‐bit digital‐to‐analogue converters (DACs). The problem is formulated as maximising the output signal‐to‐interference‐plus‐noise ratio in the presence of signal‐dependent interferences, subject to a discrete constraint imposed by the waveform quantised with one‐bit DACs. …”
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A Novel Low-bit-rate Speech Coding Based on Decomposition of the Pitch-cycle Waveform of the Linear Predictive Residual by Bao ChangchunAssociate professor of Information Engineering, Beijing Polytechnic University, Ph.D, CIE senior member (Department of Electronic Engineering, Beijing Polytechnic University, Beijing 100022) Fan ChangxinProfessor of Information Engineerin

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A Millimeter-Wave Single-Bit Reconfigurable Intelligent Surface With High-Resolution Beam-Steering and Suppressed Quantization Lobe by Aditya S. Shekhawat, Bharath G. Kashyap, Russell W. Raldiris Torres, Feiyu Shan, Georgios C. Trichopoulos

“…We present a 1-bit reconfigurable intelligent surface (RIS) operating at millimeter-wave frequencies that suppresses the undesired grating lobes encountered in binary phase modulation schemes and achieves high resolution beam steering. …”
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Bit error rate performance analysis of TCM-8PSK system based on band-limited nonlinear satellite channel by LI Jing1, LIU Zhen-fang3, LI Ai-hong2, SHEN Rong-jun2

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Realization of 10bit, 200MHz sampling frequency CMOS video D/A converter with gradient error compensation by HUANG Jiao-ying1, HE Yi-gang1 YANG Hui1, TANG Sheng-xue1, SHEN Fang1

“…A circuit of 10bit,200MHz sampling frequency current steering DAC with hierarchical symmetrical switching sequences was presented,which compensate the gradient error.The DAC employs segmented architecture.An integral linearity error caused by error distributes of current sources was reduced by a new switching sequence called "hierarchi-cal symmetrical switching".The DAC was built in a video-rate adaptive equalizer IC,which was fabricated in a 0.35μm,3.3V CMOS process.The area of DAC is 1.26mm×0.78mm.When operating at 14.318 MHz（4Fsc） sampling freguency,the effective numbers of bits is 9.3.Both the integral and the differential linearity errors are less than ± 0.5LSB.…”
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