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Application of Variable Bit Rate Video in IPTV on Demand Services
Published 2014-05-01Get full text
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Multi-pulse Fourier codes for bit transmission at the quantum limit
Published 2025-01-01“…Bit-transmission can be enhanced by the use of quantum detection techniques, realizing a joint-detection receiver (JDR) that is able to decode transmitted signals via a collective operation and achieve the Holevo channel capacity. …”
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Bit-Sliced Implementation of SM4 and New Performance Records
Published 2023-01-01“…First, we present a more efficient bit-sliced representation for SM4, which enables running 64 blocks in parallel with 256-bit registers. …”
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STRUCTURAL OPTIMIZATION AND FATIGUE LIFE STUDY OF AIR HAMMER BIT
Published 2024-04-01Subjects: “…Air hammer bit…”
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Suboptimal Greedy Power Allocation Schemes for Discrete Bit Loading
Published 2013-01-01“…We consider low cost discrete bit loading based on greedy power allocation (GPA) under the constraints of total transmit power budget, target BER, and maximum permissible QAM modulation order. …”
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Algorithm of Adaptive Bit Allocation Wavelet Transform Audio Coding
Published 1998-01-01Get full text
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INTER-LAYER BIT ALLOCATION FOR SCALABLE HIGH-EFFICIENCY VIDEO CODING
Published 2016-06-01Subjects: “…cấp phát bít…”
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SIMULATION ANALYSIS OF IMPACT DYNAMIC RESPONSE OF A COAL PLOW BIT
Published 2021-01-01Subjects: Get full text
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Educators’ intention to use tangible and graphical experimentation with Arduino and Micro:bit
Published 2025-01-01Subjects: Get full text
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Using micro:bit for building distributed sensor networks in robotic systems
Published 2024-11-01“…The purpose of the paper is to explore the possibilities of integrating the micro:bit microcontroller with external devices through UART, I2C, and SPI protocols to create modular and distributed sensor networks in robotic systems. …”
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Reconstruction of sparse check matrix for LDPC at high bit error rate
Published 2021-03-01“…In order to reconstruct the sparse check matrix of LDPC, a new algorithm which could directly reconstruct the LDPC was proposed.Firstly, according to the principle of the traditional reconstruction algorithm, the defects of the traditional algorithm and the reasons for the defects were analyzed in detail.Secondly, based on the characteristics of sparse matrix, some bit sequences in code words were randomly extracted for Gaussian elimination.At the same time, in order to reliably realize that the extracted bits sequence could contain parity check nodes, the multiple random variables were determined based on the probability of containing check nodes in one extraction.Finally, the statistical characteristics of LDPC under the suspected check vector was analyzed.Based on the minimum error decision rule, the sparse check vector was determined.The simulation results show that the rate of reconstruction of most LDPC in IEEE 802.11 protocol can reach more than 95% at BER of 0.001, and the noise robustness of the proposed method is better than that of the traditional algorithm.At the same time, the new algorithm not only does not need sparseness of parity check matrix, but also has the good performance for both diagonal and non-diagonal check matrix.…”
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1 bit Compressive Spectrum Sensing Algoritbm Based on Distributed Model
Published 2014-09-01Subjects: Get full text
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Improved Design of Bit Synchronization Clock Extraction in Digital Communication System
Published 2018-01-01“…The results show that the improved system performs the accurate extraction of bit synchronized clock, reduces the phase jitter problem, improves the system running efficiency and the ability of anti-interference, and guarantees the synchronization performance of the digital communication system.…”
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Improved multi-bits flipping algorithm for high-speed LDPC decoding
Published 2014-02-01Subjects: Get full text
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An Association Rule Mining Scheme Based on Bit Operation and Reverse Index
Published 2015-11-01Subjects: Get full text
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Application of 16 bit image lossy compression based on the JPEG standard
Published 2016-04-01Subjects: “…16 bit image lossy compression…”
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Efficient Algorithms for Optimal 4-Bit Reversible Logic System Synthesis
Published 2013-01-01“…Owing to the exponential nature of the memory and run-time complexity, many methods can only synthesize 3-bit reversible circuits and cannot synthesize 4-bit reversible circuits well. …”
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Storage-Efficient 16-Bit Hybrid IP Traceback with Single Packet
Published 2014-01-01“…Some even have false positives because they use an IP header’s fragment offset for marking. Thus, we propose a 16-bit single packet hybrid IP traceback scheme that combines packet marking and packet logging with high accuracy and low storage requirement. …”
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