Showing 1 - 9 results of 9 for search '"VLSI design"', query time: 0.04s Refine Results
  1. 1
    PAGR: Accelerating Global Routing for VLSI Design Flow

    PAGR: Accelerating Global Routing for VLSI Design Flow by Roman A. Solovyev, Ilya A. Mkrtchan, Dmitry V. Telpukhov, Ilya I. Shafeev, Aleksandr Y. Romanov, Yevgeniy V. Stolbikov, Alexander L. Stempkovsky

    Published 2025-01-01
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  2. 2
    Saliency-Based Bleeding Localization for Wireless Capsule Endoscopy Diagnosis

    Saliency-Based Bleeding Localization for Wireless Capsule Endoscopy Diagnosis by Hongda Chen, Shaoze Wang, Yong Ding, Dahong Qian

    Published 2017-01-01
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  3. 3
    Estimation and Statistical Analysis of Human Voice Parameters to Investigate the Influence of Psychological Stress and to Determine the Vocal Tract Transfer Function of an Individual

    Estimation and Statistical Analysis of Human Voice Parameters to Investigate the Influence of Psychological Stress and to Determine the Vocal Tract Transfer Function of an Individu... by Puneet Kumar Mongia, R. K. Sharma

    Published 2014-01-01
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  4. 4
    Hybrid Model: An Efficient Symmetric Multiprocessor Reference Model

    Hybrid Model: An Efficient Symmetric Multiprocessor Reference Model by Shupeng Wang, Kai Huang, Tianyi Xie, Xiaolang Yan

    Published 2015-01-01
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  5. 5
    Low Power Systolic Array Based Digital Filter for DSP Applications

    Low Power Systolic Array Based Digital Filter for DSP Applications by S. Karthick, S. Valarmathy, E. Prabhu

    Published 2015-01-01
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  6. 6
    Study on Single Event Upset and Mitigation Technique in JLTFET-Based 6T SRAM Cell

    Study on Single Event Upset and Mitigation Technique in JLTFET-Based 6T SRAM Cell by Aishwarya K, Lakshmi B

    Published 2024-01-01
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  7. 7
    A Glitch-Free Novel DET-FF in 22 nm CMOS for Low-Power Application

    A Glitch-Free Novel DET-FF in 22 nm CMOS for Low-Power Application by Sumitra Singar, N. K. Joshi, P. K. Ghosh

    Published 2018-01-01
    “…Dual edge triggered (DET) techniques are most liked choice for the researchers in the field of digital VLSI design because of its high-performance and low-power consumption standard. …”
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  8. 8
    A Review on Frequency Compensation and Transient Enhancement Schemes of Flipped Voltage Follower LDO Regulators for SoC Applications

    A Review on Frequency Compensation and Transient Enhancement Schemes of Flipped Voltage Follower LDO Regulators for SoC Applications by P. Manikandan, B. Bindu

    Published 2025-01-01
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  9. 9
    A Physical Charge-Based Analytical Threshold Voltage Model for Cryogenic CMOS Design

    A Physical Charge-Based Analytical Threshold Voltage Model for Cryogenic CMOS Design by Hao Su, Yiyuan Cai, Shenghua Zhou, Guangchong Hu, Yu He, Yunfeng Xie, Yuhuan Lin, Chunhui Li, Tianqi Zhao, Jun Lan, Wenhui Wang, Wenxin Li, Feichi Zhou, Xiaoguang Liu, Longyang Lin, Yida Li, Hongyu Yu, Kai Chen

    Published 2024-01-01
    “…The model retains standard threshold voltage definition by various charges across the MOSFET capacitor while being analytical in its form, therefore, suitable for cryogenic CMOS VLSI design. Consequently, a model covering each and all above characteristics is proposed for the first time. …”
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