Showing 21 - 40 results of 40 for search '"VLSI"', query time: 0.05s Refine Results
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    Gamma Splines and Wavelets by Hannu Olkkonen, Juuso T. Olkkonen

    Published 2013-01-01
    “…Finally, we discuss the suitability of the gamma spline signal processing in embedded VLSI environment.…”
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    Article
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    Global Detection of Live Virtual Machine Migration Based on Cellular Neural Networks by Kang Xie, Yixian Yang, Ling Zhang, Maohua Jing, Yang Xin, Zhongxian Li

    Published 2014-01-01
    “…Compared with the best fit heuristic algorithm, this approach reduces the processing time, and emerging evidence has indicated that this new approach is affordable to parallelism and analog very large scale integration (VLSI) implementation allowing the VM migration detection to be performed better.…”
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    Article
  5. 25

    Drive Current Enhancement in TFET by Dual Source Region by Zhi Jiang, Yiqi Zhuang, Cong Li, Ping Wang, Yuqi Liu

    Published 2015-01-01
    “…It is confirmed that the proposed TFET has strong potentials for VLSI.…”
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    Article
  6. 26

    The optimal design of an LNA by using of CAD tool based on the modified inclined planes system optimization by Najmeh Shahraki, Ali Mohammadi

    Published 2023-03-01
    “…Low Noise Amplifier (LNA) is the first critical and important element in the designing of analog VLSI systems and wireless communications technology. …”
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    Article
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    A Soft Computing Approach to Crack Detection and Impact Source Identification with Field-Programmable Gate Array Implementation by Arati M. Dixit, Harpreet Singh

    Published 2013-01-01
    “…The CDISI fuzzy inference system is developed using MATLAB’s fuzzy logic toolbox. A VLSI circuit for CDISI is developed on basis of fuzzy logic model using Verilog, a hardware description language (HDL). …”
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    Article
  9. 29

    A Glitch-Free Novel DET-FF in 22 nm CMOS for Low-Power Application by Sumitra Singar, N. K. Joshi, P. K. Ghosh

    Published 2018-01-01
    “…Dual edge triggered (DET) techniques are most liked choice for the researchers in the field of digital VLSI design because of its high-performance and low-power consumption standard. …”
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    Article
  10. 30

    Technology and Modeling of Nonclassical Transistor Devices by George V. Angelov, Dimitar N. Nikolov, Marin H. Hristov

    Published 2019-01-01
    “…This paper presents a comprehensive outlook for the current technology status and the prospective upcoming advancements. VLSI scaling trends and technology advancements in the context of sub-10-nm technologies are reviewed as well as the associated device modeling approaches and compact models of transistor structures are considered. …”
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    Article
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    A Power-Efficient Soft-Output Detector for Spatial-Multiplexing MIMO Communications by Hsiao-Chi Wang, Tung-Lin Liu, Yuan-Wei Wu, Hsi-Pin Ma

    Published 2012-01-01
    “…VLSI implementation of a configurable power-efficient MIMO detector is proposed to support 4×4 spatial multiplexing and modulation from QPSK to 64-QAM. …”
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    Article
  13. 33

    Topology-Aware Bus Routing in Complex Networks of Very-Large-Scale Integration with Nonuniform Track Configurations and Obstacles by Ziran Zhu, Zhipeng Huang, Jianli Chen, Longkun Guo

    Published 2021-01-01
    “…As one of the most important routing problems in the complex network within a very-large-scale integration (VLSI) circuit, bus routing has become much more challenging when witnessing the advanced technology node enters the deep nanometer era because all bus bits need to be routed with the same routing topology in the context. …”
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    Article
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    A Physical Charge-Based Analytical Threshold Voltage Model for Cryogenic CMOS Design by Hao Su, Yiyuan Cai, Shenghua Zhou, Guangchong Hu, Yu He, Yunfeng Xie, Yuhuan Lin, Chunhui Li, Tianqi Zhao, Jun Lan, Wenhui Wang, Wenxin Li, Feichi Zhou, Xiaoguang Liu, Longyang Lin, Yida Li, Hongyu Yu, Kai Chen

    Published 2024-01-01
    “…The model retains standard threshold voltage definition by various charges across the MOSFET capacitor while being analytical in its form, therefore, suitable for cryogenic CMOS VLSI design. Consequently, a model covering each and all above characteristics is proposed for the first time. …”
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    Article
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