Design of Approximate Adder With Reconfigurable Accuracy by Aalelai Vendhan, Syed Ershad Ahmed, S. Gurunarayanan

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Ternary computing using a novel spintronic multi-operator logic-in-memory architecture by Amirhossein Fathollahi, Abdolah Amirany, Mohammad Hossein Moaiyeri

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Ternary Toward Binary: Circuit-Level Implementation of Ternary Logic Using Depletion-Mode and Conventional MOSFETs by Hyundong Lee, Seonghoon Kim, Jongbeom Kim, Jaehoon Jeong, Jeonggyu Yang, Taigon Song

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Comprehensive survey of ternary full adders: Statistics, corrections, and assessments by Sarina Nemati, Mostafa Haghi Kashani, Reza Faghih Mirzaee

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