TSMC: A Novel Approach for Live Virtual Machine Migration by Jiaxing Song, Weidong Liu, Feiran Yin, Chao Gao

“…In this paper, we present a novel approach called TSMC (three-stage memory copy) for live virtual machine migration. …”
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Microwave Pioneers: Mau-Chung Frank Chang, “The Power of Connections” by Peter H. Siegel

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Super-Twisting-Algorithm-Based Terminal Sliding Mode Control for a Bioreactor System by Sendren Sheng-Dong Xu

“…This study proposes a class of super-twisting-algorithm-based (STA-based) terminal sliding mode control (TSMC) for a bioreactor system with second-order type dynamics. …”
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Finite-Time Terminal Sliding Mode Tracking Control for Piezoelectric Actuators by Jin Li, Liu Yang

“…The robust stability of the TSMC is proved through a Lyapunov stability analysis. …”
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An Analysis of Temperature-Dependent Timing Jitter Factors in the Structural Design of Complementary Metal-Oxide-Semiconductor Single-Photon Avalanche Detectors by Jau-Yang Wu, Yu-Wei Lu, Meng-Hsuan Liu, Tien-Ning Chang, Chun-Hsien Liu

“…In this study, we analyze the jitter characteristics of SPAD devices, focusing on the influence of device structures in two SPAD designs fabricated using the TSMC 18HV and TSMC 13HV processes. Using picosecond lasers with wavelengths ranging from ultraviolet (405 nm) to near-infrared (905 nm), we investigate the impact of different diffusion carrier types on jitter values and their temperature dependence across a range of 0 °C to 60 °C. …”
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Saber With Hybrid Striding Toom Cook-Based Multiplier: Implementation Using Open-Source Tool Flow and Industry Standard Chip Design Tools by Muhammad Naveed Abbasi, Abdul Rehman Aslam, Muhammad Awais Bin Altaf, Wala Saadeh

“…The realized chip for the proposed Saber implementation resulted in an area of 12 mm2 and 43.59 mm2/16 mm2 for TSMC CMOS 180nm and SKY-WATER CMOS 180nm/130nm process, respectively. …”
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Current Mode Full-Wave Rectifier Based on a Single MZC-CDTA by Neeta Pandey, Rajeshwari Pandey

“…The functionality of the circuit is verified with SPICE simulation using 0.35 μm TSMC CMOS technology parameters.…”
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Cascadable Current-Mode First-Order All-Pass Filter Based on Minimal Components by Jitendra Mohan, Sudhanshu Maheshwari

“…The theoretical results are verified using PSPICE simulation program with TSMC 0.35 μm CMOS process parameters.…”
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Gm-Realization of Controlled-Gain Current Follower Transconductance Amplifier by Worapong Tangsrirat

“…The circuit is designed and analyzed in 0.35 μm TSMC CMOS technology. Simulation results for the circuit with ±1.25 V supply voltages show that it consumes only 0.43 mw quiescent power with 70 MHz bandwidth. …”
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Tunable First-Order Resistorless All-Pass Filter with Low Output Impedance by Parveen Beg

“…The proposed DD-DXCCII filters are simulated using TSMC the 0.25 µm technology.…”
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VM and CM Universal Filters Based on Single DVCCTA by Neeta Pandey, Sajal K. Paul

“…SPICE simulation using 0.25 μm TSMC CMOS technology parameters is included to show the workability of the proposed circuits.…”
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An Approach to Increase Power-Added Efficiency in a 5 GHz Class E Power Amplifier in 0.18 µm CMOS Technology by Hemad Heidari Jobaneh

“…Advanced design system and TSMC 0.18 µm CMOS process are utilized to carry on the simulation.…”
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Single CDTA-Based Current Mode All-Pass Filter and Its Applications by Neeta Pandey, Sajal K. Paul

“…The functionality of the circuit is verified with SPICE simulation using 0.35  𝜇 m TSMC CMOS technology parameters.…”
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Differential Difference Current Conveyor Transconductance Amplifier: A New Analog Building Block for Signal Processing by Neeta Pandey, Sajal K. Paul

“…The proposed block is implemented using 0.25 μm TSMC CMOS technology. Some of the applications are presented using the proposed DDCCTA, namely, a voltage mode multifunction filter, a current mode universal filter, an oscillator, current and voltage amplifiers, and grounded inductor simulator. …”
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The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS Technology by Hemad Heidari Jobaneh

“…MATLAB and Advanced Design System (ADS) are utilized to design and simulate the LNA. In addition, TSMC 0.13 μm CMOS process is used in ADS. The LNA is biased with two different voltage supplies in order to reduce power consumption. …”
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Low Power Systolic Array Based Digital Filter for DSP Applications by S. Karthick, S. Valarmathy, E. Prabhu

“…Implementation was done with ASIC design methodology using TSMC 65 nm technological library node. The proposed systolic array filter has reduced leakage power up to 8.5% than the existing filter architectures.…”
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Bandwidth Extension of High Compliance Current Mirror by Using Compensation Methods by Maneesha Gupta, Urvashi Singh, Richa Srivastava

“…The circuits are designed in TSMC 0.18 μm CMOS technology on Spectre simulator of Cadence.…”
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Realization of DVCCTA Based Versatile Modulator by Neeta Pandey, Rajeshwari Pandey, Aseem Sayal, Manan Tripathi

“…The functionality of the proposed circuit is verified through SPICE simulations using TSMC 0.25 μm CMOS process model parameters. The performance parameters such as power dissipation and noise for various modulator schemes are also obtained.…”
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An On-Chip Planar Inverted-F Antenna at 38 GHz for 5G Communication Applications by Syed Muhammad Ammar Ali

“…This paper presents an on-chip planar inverted-F antenna (PIFA) implemented in TSMC 180 nm CMOS process technology. The antenna operates at a 5 G millimeter-wave center frequency of 38 GHz. …”
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Modified Tang and Pun’s Current Comparator and Its Application to Full Flash and Two-Step Flash Current Mode ADCs by Veepsa Bhatia, Neeta Pandey

“…The theoretical propositions are verified through spice simulation using 0.18 μm TSMC CMOS technology at a power supply of 1.8 V. …”
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